Memory system which stores meta-data and meta-log, and operating method thereof

• US 10,553,295 B2
• Filed: 08/22/2017
• Issued: 02/04/2020
• Est. Priority Date: 11/24/2016
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: Song, Hae-Lyong
• Primary Examiner(s): Cho, Sung Il
• Application Number:
  US15/682,657
• Publication Number:
  US 20180144806A1
• Time in Patent Office: 896 Days
• Field of Search: 36518511
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/16 for erasing blocks, e.g. arrays, words, groups
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 2029/0411 Online error correction

Abstract

A memory system may include: a nonvolatile memory device suitable for storing write-requested data; and a controller including a first volatile memory region suitable for storing meta-data for the write-requested data and a second volatile memory region suitable for storing a meta-log for the meta-data, the controller may store the meta-data or the meta-log according to a logical address range of the meta-data.

Claims

1. A memory system comprising:

a nonvolatile memory device suitable for storing write-requested data; and

a controller including a first volatile memory region suitable for storing a meta-data associated with the write-requested data and a second volatile memory region suitable for storing a meta-log regarding the meta-data,

wherein the controller generates and stores the meta-data associated with write-requested data in the first volatile memory region without generating the meta-log regarding the generated meta-data, when a logical address of the meta-data being within a predetermined threshold range.

2. The memory system of claim 1, wherein the controller compares the logical address of the meta-data with the predetermined threshold range, when generating the meta-data associated with the write-requested data.

3. The memory system of claim 1, wherein, the controller generates the meta-log regarding the meta-data and stores the meta-log in the second volatile memory region, when the logical address of the meta-data does not fall within the predetermined threshold range.

4. The memory system of claim 3,

wherein the meta-data stored in the first volatile memory region are divided into a plurality of meta-data groups each having logical address within the predetermined threshold range and a suitable size for being stored to the nonvolatile memory device through a single storage operation, and

wherein, when a number of meta-logs in the second volatile memory region reaches a predetermined threshold number, the controller further:

selects one or more meta-logs stored in the second volatile memory region such that corresponding meta-data are included in a single one among the plurality of meta-data groups;

updates the meta-data based on the meta-logs stored in the second volatile memory region;

invalidates the meta-logs used for the update of the meta-data;

stores the updated meta-data, the invalidated meta-logs and remaining valid meta-logs in the nonvolatile memory device; and

erases the invalidated meta-logs in the second volatile memory region.

5. The memory system of claim 4,

wherein the respective meta-data includes a logical address mapped to a physical address of the write-requested data stored in the nonvolatile memory device, and

wherein the respective meta-logs include a logical address mapped to a physical address of the write-requested data stored in the nonvolatile memory device.

6. The memory system of claim 4, wherein, when turning off the memory system, the controller further:

updates the meta-data based on all of the meta-logs stored in the second volatile memory region;

invalidates all of the meta-logs stored in the second volatile memory region;

stores all of the meta-data and all of the meta-logs in the nonvolatile memory device; and

erases the invalidated meta-logs in the second volatile memory region.

7. The memory system of claim 6, wherein the respective meta-logs represent change history of the respective meta-data stored in the first volatile memory region.

8. The memory system of claim 7, wherein the controller stores the meta-data in the nonvolatile memory device by units of the plurality of meta-data groups through a plurality of storage operations.

9. An operating method for a memory system comprising a nonvolatile memory device, and first and second volatile memory regions, the operating method comprising:

storing write-requested data in the nonvolatile memory device;

generating a meta-data associated with the write-requested data;

selectively generating a meta-log regarding the generated meta-data, wherein the meta-log is not generated when a logical address of the meta-data being within a predetermined threshold range; and

storing the generated meta-data in the first volatile memory region and the generated meta-log in the second volatile memory region.

10. The operating method of claim 9, further comprising comparing the logical address of the meta-data with the predetermined threshold range, when generating the meta-data associated with the write-requested data.

11. The operating method of claim 9, wherein the selectively generating includes generating the meta-log regarding the meta-data when the logical address of the meta-data does not fall within the predetermined threshold range.

12. The operating method of claim 11,

wherein the meta-data stored in the first volatile memory region are divided into a plurality of meta-data groups each having logical address within the predetermined threshold range and a suitable size for being stored to the nonvolatile memory device through a single storage operation, and

when a number of meta-logs in the second volatile memory region reaches a predetermined threshold number, further comprising:

selecting one or more meta-logs stored in the second volatile memory region such that corresponding meta-data are included in a single one among the plurality of meta-data groups;

updating the meta-data based on the meta-logs stored in the second volatile memory region;

invalidating the meta-logs used for the update of the meta-data;

storing the updated meta-data, the invalidated meta-logs and remaining valid meta-logs in the nonvolatile memory device; and

erasing the invalidated meta-logs in the second volatile memory region.

13. The operating method of claim 12,

wherein the respective meta-data includes a logical address mapped to a physical address of the write-requested data stored in the nonvolatile memory device, and

wherein the respective meta-logs include a logical address mapped to a physical address of the write-requested data stored in the nonvolatile memory device.

14. The operating method of claim 12, when turning off the memory system, further comprising:

updating the meta-data based on all of the meta-logs stored in the second volatile memory region;

invalidating all of the meta-logs stored in the second volatile memory region;

storing all of the meta-data and all of the meta-logs in the nonvolatile memory device; and

erasing the invalidated meta-logs in the second volatile memory region.

15. The operating method of claim 14, wherein the respective meta-logs represent change history of the respective meta-data stored in the first volatile memory region.

16. The operating method of claim 15, wherein the storing of the meta-data in the nonvolatile memory device is performed by units of the plurality of meta-data groups through a plurality of storage operations.