Wafer level packaging of microbolometer vacuum package assemblies

• US 10,553,454 B2
• Filed: 08/21/2017
• Issued: 02/04/2020
• Est. Priority Date: 12/31/2012
• Status: Active Grant

• Current Assignee: Teledyne FLIR LLC (Teledyne Technologies Incorporated)
• Original Assignee: FLIR Systems, Inc. (Teledyne Technologies Incorporated)
• Inventors: Schweikert, Paul, Sharpe, Andrew, Carlson, Gregory A., Matson, Alex, Vilander, Scott, Zahuta, Bob, Goeden, Richard M.
• Primary Examiner(s): Wilczewski, Mary A
• Application Number:
  US15/682,459
• Publication Number:
  US 20170372920A1
• Time in Patent Office: 897 Days
• Field of Search: 438908, 438455-459
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 21/67109 mainly by convection
• CPC Class Codes: H01L 21/6719 characterized by the construction of the processing chambers, e.g. modular processing chambers
• CPC Class Codes: H01L 21/67207 comprising a chamber adapted to a particular process
• CPC Class Codes: H01L 21/67745 characterized by movements or sequence of movements of transfer devices
• CPC Class Codes: H01L 21/67748 horizontal transfer of a single workpiece
• CPC Class Codes: H01L 21/67757 vertical transfer of a batch of workpieces
• CPC Class Codes: H01L 21/681 using optical controlling means
• CPC Class Codes: H01L 21/6831 using electrostatic chucks
• CPC Class Codes: H01L 24/94 at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H01L 2924/16235 Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
• CPC Class Codes: H01L 31/0203 Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80
• CPC Class Codes: H01L 31/09 Devices sensitive to infrared, visible or ultraviolet radiation H01L31/101 takes precedence

Abstract

An apparatus for the wafer level packaging (WLP) of micro-bolometer vacuum package assemblies (VPAs), in one embodiment, includes a wafer alignment and bonding chamber, a bolometer wafer chuck and a lid wafer chuck disposed within the chamber in vertically facing opposition to each other, means for creating a first ultra-high vacuum (UHV) environment within the chamber, means for heating and cooling the bolometer wafer chuck and the lid wafer chuck independently of each other, means for moving the lid wafer chuck in the vertical direction and relative to the bolometer wafer chuck, means for moving the bolometer wafer chuck translationally in two orthogonal directions in a horizontal plane and rotationally about a vertical axis normal to the horizontal plane, and means for aligning a fiducial on a bolometer wafer held by the bolometer wafer chuck with a fiducial on a lid wafer held by the lid wafer chuck.

Claims

1. A system comprising:

a central chamber configured to receive and provide wafers;

a load lock module configured to receive wafers from and provide wafers to the central chamber; and

a wafer alignment and bonding chamber configured to receive a first wafer from the central chamber, receive a second wafer from the central chamber, bond the first wafer and the second wafer to form a bonded wafer, and provide the bonded wafer to the central chamber, wherein the wafer alignment and bonding chamber comprises;

a first wafer chuck configured to receive the first wafer;

a second wafer chuck configured to receive the second wafer, wherein the first wafer chuck is disposed within the wafer alignment and bonding chamber in facing opposition to the second wafer chuck; and

a radiation shield configured to move between a first position and a second position, wherein the radiation shield is disposed between the first wafer chuck and the second wafer chuck in the first position, and wherein the first wafer chuck and/or the second wafer chuck is configured to move to contact the second wafer received by the second wafer chuck with the first wafer received by the first wafer chuck,

wherein the central chamber, the load lock module, and the wafer alignment and bonding chamber are configured to process the wafers under one or more vacuum environments.

2. The system of claim 1, wherein the central chamber is configured to receive and provide wafers under a vacuum environment, the load lock module is configured to receive wafers and provide wafers under a first ultra-high vacuum (UHV) environment, and the wafer alignment and bonding chamber is configured to form the bonded wafer under a second UHV environment.

3. The system of claim 2, wherein the UHV environments are environments with pressures lower than 100 nanopascals.

4. The system of claim 2, further comprising:

a load lock ultra-high vacuum (UHV) slot valve coupled to the central chamber and the load lock module;

a bonding and alignment UHV slot valve coupled to the central chamber and the wafer alignment and bonding chamber;

a first bake out UHV slot valve coupled to the central chamber;

a second bake out UHV slot valve coupled to the central chamber;

a first bake out module configured to receive the first wafer from the central chamber via the first bake out UHV slot valve, pre-bake the first wafer, and provide the first wafer to the central chamber via the first bake out UHV slot valve; and

a second bake out module configured to receive the second wafer from the central chamber via the second bake out UHV slot valve, pre-bake the second wafer, and provide the second wafer to the central chamber via the second bake out UHV slot valve.

5. The system of claim 4, wherein the central chamber, the load lock UHV slot valve, the first bake out UHV slot valve, the second bake out UHV slot valve, the bonding and alignment UHV slot valve, the load lock module, the first bake out module, the second bake out module, and the wafer alignment and bonding chamber are all configured to be maintained under UHV environments.

6. The system of claim 4, wherein:

the load lock module, the first bake out module, the second bake out module, and the wafer alignment and bonding chamber are radially disposed around the central chamber; and

the load lock UHV slot valve, the first bake out UHV slot valve, the second bake out UHV slot valve, and the bonding and alignment UHV slot valve are radially disposed around the central chamber.

7. The system of claim 4, wherein the first bake out module is configured to pre-bake the first wafer for a different time, at a different temperature, and/or at a different UHV profile than pre-baking the second wafer in the second bake out module.

8. The system of claim 4, wherein each of the load lock module, the first bake out module, the second bake out module, the wafer alignment and bonding chamber, and the central chamber comprise one or more associated cyropumps.

9. The system of claim 2, further comprising:

a first buffer UHV slot valve coupled to the central chamber;

a second buffer UHV slot valve coupled to the central chamber;

a first buffer module configured to receive the first wafer from the central chamber via the first buffer UHV slot valve and provide the first wafer to the central chamber via the first buffer UHV slot valve; and

a second buffer module configured to receive the second wafer from the central chamber via the second buffer UHV slot valve and provide the second wafer to the central chamber via the second buffer UHV slot valve.

10. The system of claim 1, wherein the load lock module and the wafer alignment and bonding chamber are radially disposed around the central chamber.

11. The system of claim 1, wherein the second wafer chuck is configured to be heated and cooled and the first wafer is configured to be heated and cooled independent of the second wafer chuck.

12. The system of claim 1, wherein the second wafer chuck and/or the first wafer chuck is configured to move translationally and rotationally.

13. The system of claim 1, wherein the second wafer chuck and/or the first wafer chuck is configured to align a second fiducial on the second wafer received by the second wafer chuck with a first fiducial on the first wafer received by the first wafer chuck.

14. The system of claim 1, wherein the first wafer is a lid wafer, and wherein the second wafer is an infrared detector wafer.

15. The system of claim 14, wherein the infrared detector wafer is a bolometer wafer.

16. A method of using the system of claim 1, the method comprising:

providing the first wafer, under a first ultra-high vacuum (UHV) environment, from the load lock module to the central chamber;

providing the second wafer, under the first UHV environment, from the load lock module to the central chamber;

moving the first wafer from the central chamber to the wafer alignment and bonding chamber;

moving the second wafer from the central chamber to the wafer alignment and bonding chamber under a vacuum environment; and

bonding the first wafer and the second wafer to form the bonded wafer under a second UHV environment.

17. The method of claim 16, wherein the first wafer and the second wafer are moved under one or more vacuum environments.

18. The method of claim 16, further comprising:

moving the first wafer from the central chamber to a first bake out module;

pre-baking the first wafer in a third UHV environment;

moving the first wafer from the first bake out module to the central chamber;

moving the second wafer from the central chamber to a second bake out module;

pre-baking the second wafer in a fourth UHV environment; and

moving the second wafer from the second bake out module to the central chamber.

19. The method of claim 18, wherein the central chamber, the load lock module, the first bake out module, the second bake out module, and the wafer alignment and bonding chamber are all maintained under UHV environments.

20. The method of claim 18, wherein the pre-baking the first wafer is for a different time, at a different temperature, and/or at a different UHV profile than the pre-baking the second wafer in the second bake out module.