Semiconductor device
First Claim
1. A semiconductor device comprising a memory element, the memory element comprising:
- a transistor; and
a capacitor,wherein the transistor comprises an oxide semiconductor layer, a gate insulating layer over the oxide semiconductor layer and a gate electrode over the gate insulating layer,wherein the oxide semiconductor layer comprises indium, zinc and a metal element other than indium and zinc,wherein one of a source electrode and a drain electrode of the transistor is electrically connected to a row decoder through a first wiring,wherein the other of the source electrode and the drain electrode of the transistor is electrically connected to one of terminals of the capacitor,wherein the gate electrode of the transistor is electrically connected to a column decoder through a second wiring,wherein the other one of terminals of the capacitor is electrically connected to a third wiring,wherein an off-state current of the transistor is 1×
10−
12 A or lower at a drain voltage of 6V and a gate voltage of −
5V or −
10V, andwherein a hydrogen concentration in a channel formation region of the oxide semiconductor layer is less than or equal to 5×
1019 cm−
3.
1 Assignment
0 Petitions
Accused Products
Abstract
An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
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Citations
13 Claims
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1. A semiconductor device comprising a memory element, the memory element comprising:
-
a transistor; and a capacitor, wherein the transistor comprises an oxide semiconductor layer, a gate insulating layer over the oxide semiconductor layer and a gate electrode over the gate insulating layer, wherein the oxide semiconductor layer comprises indium, zinc and a metal element other than indium and zinc, wherein one of a source electrode and a drain electrode of the transistor is electrically connected to a row decoder through a first wiring, wherein the other of the source electrode and the drain electrode of the transistor is electrically connected to one of terminals of the capacitor, wherein the gate electrode of the transistor is electrically connected to a column decoder through a second wiring, wherein the other one of terminals of the capacitor is electrically connected to a third wiring, wherein an off-state current of the transistor is 1×
10−
12 A or lower at a drain voltage of 6V and a gate voltage of −
5V or −
10V, andwherein a hydrogen concentration in a channel formation region of the oxide semiconductor layer is less than or equal to 5×
1019 cm−
3. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor device comprising a memory element, the memory element comprising:
-
a transistor; and a capacitor, wherein the transistor comprises an oxide semiconductor layer, wherein one of a source electrode and a drain electrode of the transistor is electrically connected to a row decoder through a first wiring, wherein the other of the source electrode and the drain electrode of the transistor is electrically connected to one of terminals of the capacitor, wherein a gate electrode of the transistor is electrically connected to a column decoder through a second wiring, wherein the other one of terminals of the capacitor is electrically connected to a third wiring, and wherein an off-state current of the transistor is 1×
10−
12 A or lower at a drain voltage of 6V and a gate voltage of −
5V or −
10V. - View Dependent Claims (7, 8, 9)
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10. A semiconductor device comprising a memory element, the memory element comprising:
-
a transistor; and a capacitor, wherein the transistor comprises an oxide semiconductor layer, wherein one of a source electrode and a drain electrode of the transistor is electrically connected to a row decoder through a first wiring, wherein the other of the source electrode and the drain electrode of the transistor is electrically connected to one of terminals of the capacitor, wherein a gate electrode of the transistor is electrically connected to a column decoder through a second wiring, wherein the other one of terminals of the capacitor is electrically connected to a third wiring, wherein an off-state current of the transistor is 1×
10−
12 A or lower at a drain voltage of 6V and a gate voltage of −
5V or −
10V, andwherein the oxide semiconductor layer is a crystalline oxide semiconductor layer. - View Dependent Claims (11, 12, 13)
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Specification