Complementary current field-effect transistor devices and amplifiers
First Claim
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1. A solid-state device comprising:
- a. first and second complementary field effect transistors, each comprising a gate, a source and a drain, wherein the source and drain of the first transistor define a first channel and the source and drain of the second transistor define a second channel;
b. a first diffusion (first iPort) that divides the first channel into a first source channel segment between the source and the first iPort and a first drain channel segment between the first iPort and the drain, and a second diffusion (second iPort) that divides the second channel into a second source channel segment between the source and the second iPort and a second drain channel segment between the second iPort and the drain;
c. the gate of the first transistor is coupled to the first source channel segment and the first drain channel segment,d. the gate of the second transistor is coupled to the second source channel segment and the second drain channel segment.
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Abstract
The present invention relates to a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. In particular, the present invention relates to a solid state device based on a complementary pair of n-type and p-type current field-effect transistors, each of which has two control ports, namely a low impedance port and gate control port, while a conventional solid state device has one control port, namely gate control port. This novel solid state device provides various improvement over the conventional devices.
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Citations
23 Claims
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1. A solid-state device comprising:
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a. first and second complementary field effect transistors, each comprising a gate, a source and a drain, wherein the source and drain of the first transistor define a first channel and the source and drain of the second transistor define a second channel; b. a first diffusion (first iPort) that divides the first channel into a first source channel segment between the source and the first iPort and a first drain channel segment between the first iPort and the drain, and a second diffusion (second iPort) that divides the second channel into a second source channel segment between the source and the second iPort and a second drain channel segment between the second iPort and the drain; c. the gate of the first transistor is coupled to the first source channel segment and the first drain channel segment, d. the gate of the second transistor is coupled to the second source channel segment and the second drain channel segment. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A solid-state device comprising:
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e. first and second complementary field effect transistors, each comprising a source gate terminal, a drain gate terminal, a source and a drain, wherein the source and drain of the first transistor define a first channel and the source and drain of the second transistor define a second channel; f. a first diffusion (first iPort) that divides the first channel into a first source channel segment between the source and the first iPort and a first drain channel segment between the first iPort and the drain, and a second diffusion (second iPort) that divides the second channel into a second source channel segment between the source and the second iPort and a second drain channel segment between the second iPort and the drain; g. the source gate terminal of the first transistor being coupled to the first source channel segment;
the drain gate terminal of the first transistor being coupled to the first drain channel segment;
the source gate terminal of the second transistor being coupled to the second source channel segment; and
the drain gate terminal of the second transistor being coupled to the second drain channel segment. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification