Reference signal correction circuit
First Claim
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1. A method, comprising:
- receiving a first calibrated voltage based on a base-emitter voltage of one or more pnp transistors, a second calibrated voltage based on a base-emitter voltage of one or more npn transistors, and a reference voltage;
determining a set of reference values based on the first calibrated voltage, the second calibrated voltage, and the reference voltage;
calculating a gain correction factor based on a function of the set of reference values and a set of temperature-dependent values;
receiving an output signal based on the reference voltage; and
adjusting the output signal based on the gain correction factor.
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Abstract
In a system and method for correcting a stress-impaired signal in a circuit, a calibration circuit produces a first calibrated voltage based on a base-emitter voltage of one or more pnp transistors, a second calibrated voltage based on a base-emitter voltage of one or more npn transistors, and a voltage proportional to absolute temperature. A set of reference values are generated based on these voltages. A gain correction factor is calculated based on a function of the set of reference values and a set of temperature-dependent values, and the stress-impaired signal is corrected based on the gain correction factor.
24 Citations
23 Claims
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1. A method, comprising:
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receiving a first calibrated voltage based on a base-emitter voltage of one or more pnp transistors, a second calibrated voltage based on a base-emitter voltage of one or more npn transistors, and a reference voltage; determining a set of reference values based on the first calibrated voltage, the second calibrated voltage, and the reference voltage; calculating a gain correction factor based on a function of the set of reference values and a set of temperature-dependent values; receiving an output signal based on the reference voltage; and adjusting the output signal based on the gain correction factor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A circuit, comprising:
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means for receiving a first calibrated voltage based on a base-emitter voltage of one or more pnp transistors, a second calibrated voltage based on a base-emitter voltage of one or more npn transistors, and a reference voltage; means for determining a set of reference values based on the first calibrated voltage, the second calibrated voltage, and the reference voltage; means for calculating a gain correction factor based on a function of the set of reference values and a set of temperature-dependent values; means for receiving an output signal based on the reference voltage; and means for correcting the output signal based on the gain correction factor. - View Dependent Claims (12)
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13. A system for calibrating an output signal, comprising:
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a calibration circuit providing a first calibrated pnp voltage based on a base-emitter voltage of one or more pnp transistors and a second calibrated npn voltage based on a base-emitter voltage of one or more npn transistors; a multiplexer connected to the calibration circuit and a sense terminal, and configured to provide an analog signal selected from a sense signal at the sense terminal, the first calibrated pnp voltage, and the second calibrated npn voltage; and an analog-to-digital converter configured to generate a digital output signal based on the analog signal selected by the multiplexer and a reference voltage; a processor, the processor configured to; control the multiplexer to sample the first calibrated pnp voltage, the second calibrated npn voltage, and the sense signal for the analog-to-digital converter; receive a set of reference values from the analog-to-digital converter based on the reference voltage and a sampling of the first calibrated pnp voltage and the second calibrated npn voltage by the multiplexer; calculate a gain correction factor based on a set of reference values and a set of temperature-dependent values; adjust the digital output signal based on the gain correction factor to correct for errors introduced by the reference voltage. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification