Device and method for writing data to a resistive memory

• US 10,559,355 B2
• Filed: 09/08/2015
• Issued: 02/11/2020
• Est. Priority Date: 09/09/2014
• Status: Active Grant

• Current Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Original Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Inventors: Harrand, Michel, Vianello, Elisa, Thomas, Olivier, Giraud, Bastien
• Primary Examiner(s): Lozada, Alfredo Bermudez
• Application Number:
  US14/848,265
• Publication Number:
  US 20160071588A1
• Time in Patent Office: 1,617 Days
• Field of Search: 365148
• CPC Class Codes: G11C 13/0064 Verifying circuits or methods
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 2013/0066 Verify correct writing whilst writing is in progress, e.g. by detecting onset or cessation of current flow in cell and using the detector output to terminate writing
• CPC Class Codes: G11C 7/14 Dummy cell management; Sense reference voltage generators

Abstract

The invention relates to a resistive memory (5) including resistive elements, the resistance of each resistive element being capable of alternating between a high value in a first range of values and a low value in a second range of values smaller than the high value, the memory further comprising a device (14) for switching the resistance of at least one resistive element selected from among the resistive elements between the high and low values, the device including a first circuit capable of applying an increasing voltage across the selected resistive element while the selected resistive element is at the high value or at the low value, a second circuit capable of detecting the switching of the resistance of the selected resistive element, and a third circuit capable of interrupting the current flowing through the selected resistive element on detection of the switching.

Claims

1. A resistive memory comprising resistive elements arranged in rows and in columns, the columns being distributed in groups of columns, the resistance of each resistive element being capable of alternating between a high value in a first range of values and a low value in a second range of values smaller than the high value, the memory further comprising a device for switching, for each group, the resistance of at least one resistive element selected from among the resistive elements of said group between the high and low values, the device comprising a first circuit connected to all columns, configured to provide a first increasing voltage ramp, that is a function linearly increasing with time, and configured to apply the first increasing voltage ramp across each selected resistive element while the selected resistive element is at the high value or at the low value, the device further comprising, for each group, a second circuit configured to detect the switching of the resistance of the selected resistive element, the device further comprising, for each group, a third circuit configured to interrupt a current flowing through the selected resistive element of said group on detection of the switching and the device further comprising a fourth circuit configured to supply a second increasing voltage ramp, that is a function linearly increasing with time, the second circuit being configured to compare the second increasing voltage ramp with a voltage which varies according to the resistance of the selected resistive element, wherein the voltage is proportional to the second voltage ramp with a proportionality factor which varies according to the resistance of the selected resistive element.

2. The resistive memory of claim 1, wherein the second circuit is configured to detect that the difference between the second voltage ramp and the voltage changes sign.

3. The resistive memory of claim 1, comprising a fifth circuit for supplying a third increasing voltage ramp and a voltage divider comprising, in series, at least one resistive component and the selected resistive element, the third voltage ramp being applied across the voltage divider, the voltage being measured at a node of the voltage divider between the resistive component and the selected resistive element.

4. The resistive memory of claim 1, wherein the fourth circuit comprises additional resistive elements assembled in series and in parallel.

5. The resistive memory of claim 1, wherein the second circuit comprises a comparator receiving the second voltage ramp and the voltage and providing a binary signal which depends on the sign of the difference between the second voltage ramp and the voltage.

6. The resistive memory of claim 5, comprising a fifth circuit for supplying a third increasing voltage ramp and a voltage divider comprising, in series, at least one resistive component and the selected resistive element, the third voltage ramp being applied across the voltage divider, the voltage being measured at a node of the voltage divider between the resistive component and the selected resistive element, wherein the voltage divider further comprises a switch controlled by the binary signal or a signal derived from the binary signal.

7. A method of controlling a resistive memory comprising resistive elements arranged in rows and in columns, the columns being distributed in groups of columns, the resistance of each resistive element being capable of alternating between a high value in a first range of values and a low value in a second range of values smaller than the high value, for the switching, for each group, of the resistance of at least one resistive element selected from among the resistive elements of said group between the high and low values, the method comprising the steps of:

applying to all columns an increasing voltage ramp, that is a function linearly increasing with time, across each selected resistive element while the selected resistive element is in the high value or in the low value;

detecting, for each group, the switching of the resistance of the selected resistive element of said group;

interrupting, for each group, a current flowing through the selected resistive element of said group on detection of the switching;

supplying a second increasing voltage ramp, that is a function linearly increasing with time; and

comparing the second increasing voltage ramp with a voltage which varies according to the resistance of the selected resistive element;

wherein the voltage is proportional to the second voltage ramp with a proportionality factor which varies according to the resistance of the selected resistive element.

8. The method of claim 7, comprising detecting that the difference between the second voltage ramp and the voltage changes sign.

9. A resistive memory comprising:

resistive elements arranged in rows and in columns, the columns being distributed in groups of columns, the resistance of each resistive element alternating between a high value in a first range of values and a low value in a second range of values smaller than the high value;

a device for switching, for each group of columns, the resistance of at least one of the resistive elements selected from among the resistive elements of said group between the high and low values, the device comprising;

a first circuit connected to all columns, configured to provide a first increasing voltage ramp, that is a function linearly increasing with time, and configured to apply the first increasing voltage ramp across each selected resistive element while the selected resistive element is at the high value or at the low value;

for each group, a second circuit configured to detect the switching of the resistance of the selected resistive element;

for each group, a third circuit configured to interrupt a current flowing through the selected resistive element of said group on detection of the switching; and

a fourth circuit configured to supply a second increasing voltage ramp, the fourth circuit including a transistor and an assembly of additional resistive elements disposed in series and in parallel, wherein the transistor and the assembly of additional resistive elements are connected to a node, and wherein the second circuit compares the second increasing voltage ramp with a voltage which varies according to the resistance of the selected resistive element.