Display device

• US 10,559,598 B2
• Filed: 04/30/2015
• Issued: 02/11/2020
• Est. Priority Date: 09/19/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Akimoto, Kengo, Komori, Shigeki, Uochi, Hideki, Futamura, Tomoya, Kasahara, Takahiro
• Primary Examiner(s): Reames, Matthew L
• Assistant Examiner(s): Bodnar, John A
• Application Number:
  US14/700,562
• Publication Number:
  US 20150236054A1
• Time in Patent Office: 1,748 Days
• CPC Class Codes: G02F 1/136204 Arrangements to prevent high voltage or static electricity failures
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals

Abstract

A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.

Claims

1. A display device comprising:

a pixel portion comprising a pixel thin film transistor and a pixel electrode over a substrate, the pixel electrode being over and electrically connected to a source electrode or a drain electrode of the pixel thin film transistor;

a common wiring;

a protective circuit comprising a first thin film transistor and a second thin film transistor over the substrate; and

a terminal portion connected to a flexible printed circuit, the terminal portion being at a periphery of the substrate which is outside the protective circuit and the pixel portion,

wherein the first thin film transistor includes;

a first gate electrode connected to the pixel portion;

a first gate insulating layer over the first gate electrode;

a first oxide semiconductor layer over the first gate electrode with the first gate insulating layer interposed therebetween;

a first conductive layer in direct contact with the first oxide semiconductor layer and connected to the pixel portion, the first conductive layer including one of a source electrode and a drain electrode of the first thin film transistor;

a second conductive layer in direct contact with the first oxide semiconductor layer and connected to the common wiring, the second conductive layer including the other of the source electrode and the drain electrode of the first thin film transistor; and

an oxide insulating film in contact with an upper surface of the first oxide semiconductor layer in a region between the source electrode and the drain electrode of the first thin film transistor,

wherein the second thin film transistor includes;

a second gate electrode connected to the common wiring;

a second gate insulating layer over the second gate electrode;

a second oxide semiconductor layer over the second gate electrode with the second gate insulating layer interposed therebetween;

a third conductive layer in direct contact with the second oxide semiconductor layer and connected to the pixel portion; and

a fourth conductive layer in direct contact with the second oxide semiconductor layer and connected to the common wiring,

wherein the terminal portion includes;

a fifth conductive layer formed by processing the same conductive layer as the first to fourth conductive layers; and

a sixth conductive layer formed by processing the same conductive layer as the pixel electrode, and

wherein the sixth conductive layer is over and in contact with an upper surface of the fifth conductive layer.

2. The display device according to claim 1,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer include indium, gallium, and zinc.

3. The display device according to claim 1,

wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a scan line.

4. The display device according to claim 1,

wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a signal line.

5. The display device according to claim 1,

wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a capacitor bus line.

11. The display device according to claim 1,

wherein the fifth conductive layer is on the same plane as the first to fourth conductive layers, and

wherein the sixth conductive layer is on the same plane as the pixel electrode.

6. A display device comprising:

a pixel portion comprising a pixel thin film transistor and a pixel electrode over a substrate, the pixel electrode being over and electrically connected to a source electrode or a drain electrode of the pixel thin film transistor;

a common wiring;

a protective circuit comprising a first thin film transistor and a second thin film transistor over the substrate; and

a terminal portion connected to a flexible printed circuit, the terminal portion being at a periphery of the substrate which is outside the protective circuit and the pixel portion,

wherein the first thin film transistor includes;

a first gate electrode connected to the pixel portion;

a first gate insulating layer over the first gate electrode;

a first oxide semiconductor layer over the first gate electrode with the first gate insulating layer interposed therebetween;

a first conductive layer in direct contact with the first oxide semiconductor layer and connected to the pixel portion, the first conductive layer including one of a source electrode and a drain electrode of the first thin film transistor;

a second conductive layer in direct contact with the first oxide semiconductor layer and connected to the common wiring, the second conductive layer including the other of the source electrode and the drain electrode of the first thin film transistor; and

an oxide insulating film in contact with an upper surface of the first oxide semiconductor layer in a region between the source electrode and the drain electrode of the first thin film transistor,

wherein the second thin film transistor includes;

a second gate electrode connected to the common wiring;

a second gate insulating layer over the second gate electrode;

a second oxide semiconductor layer over the second gate electrode with the second gate insulating layer interposed therebetween;

a third conductive layer in direct contact with the second oxide semiconductor layer and connected to the pixel portion; and

a fourth conductive layer in direct contact with the second oxide semiconductor layer and connected to the common wiring, wherein the terminal portion includes;

a fifth conductive layer formed by processing the same conductive layer as the first to fourth conductive layers; and

a sixth conductive layer formed by processing the same conductive layer as the pixel electrode, and

wherein the sixth conductive layer is over and in contact with an upper surface of the fifth conductive layer with the oxide insulating film interposed therebetween.

7. The display device according to claim 6,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer include indium, gallium, and zinc.

8. The display device according to claim 6,

wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a scan line.

9. The display device according to claim 6,

wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a signal line.

10. The display device according to claim 6,

wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a capacitor bus line.

12. The display device according to claim 6,

wherein the fifth conductive layer is on the same plane as the first to fourth conductive layers, and

wherein the sixth conductive layer is on the same plane as the pixel electrode.