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Selector device having asymmetric conductance for memory applications

  • US 10,559,624 B2
  • Filed: 02/21/2017
  • Issued: 02/11/2020
  • Est. Priority Date: 02/21/2017
  • Status: Active Grant
First Claim
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1. A memory cell comprising:

  • a magnetic tunnel junction (MTJ) memory element including a magnetic free layer and a magnetic reference layer with an insulating tunnel junction layer interposed therebetween, said MTJ memory element having a low resistance state and a high resistance state that are switched in a bipolar manner; and

    a two-terminal selector conducting in two directions, said two-terminal selector having a first insulative state and a first conductive state in a first direction and a second insulative state and a second conductive state in a second direction opposite to said first direction, said first conductive state having substantially lower resistance than said second conductive state,wherein said two-terminal selector and said MTJ memory element are coupled in series in such a way that a switching current flowing in said second direction switches said MTJ memory element from said high resistance state to said low resistance state.

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