Semiconductor device and method for fabricating the same
First Claim
1. A semiconductor device, comprising:
- a first word line extending in a first direction;
a first bit line extending in a second direction that intersects the first direction, wherein the first bit line and the first word line are spaced apart from each other in a third direction that intersects the first and second directions;
a mold film disposed between the first word line and the first bit line;
a first memory cell disposed in the mold film and including a core hole, wherein the first memory cell comprises;
a first lower electrode in contact with the first word line, wherein side surfaces of the first lower electrode are in direct contact with the mold film,a first phase-charge memory in contact with the first lower electrode,a first intermediate electrode in contact with the first phase-change memory,a first ovonic threshold switch (OTS) in contact with the first intermediate electrode, anda first upper electrode disposed between the first OTS and the first bit line, the first upper electrode in contact with the first OTS and the first bit line,wherein the core hole extends in the first direction through the first lower electrode, the first phase-change memory, the first intermediate electrode, the first OTS and the first upper electrode;
a second bit line extending in the second direction, wherein the second bit line and the first bit line are spaced apart from each other in the first direction; and
a second memory cell disposed between the second bit line and the first word line,wherein the second memory cell comprises;
a second lower electrode disposed on the first word line, wherein side surfaces of the second lower electrode are in direct contact with the mold film,a second phase-change memory disposed on the second lower electrode,a second intermediate electrode disposed on the second phase-change memory,a second OTS disposed on the second intermediate electrode, anda second upper electrode disposed between the second OTS and the second bit line, the second upper electrode being in contact with the second OTS and the second bit line.
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Accused Products
Abstract
A semiconductor device includes a first word line and a first bit line. The semiconductor device further includes a mold film disposed between the first word line and the first bit line, and a first memory cell disposed in the mold film. The first memory cell includes a first lower electrode in contact with the first word line. Side surfaces of the first lower electrode are in direct contact with the mold film. The first memory cell includes a first phase-change memory in contact with the first lower electrode, a first intermediate electrode in contact with the first phase-change memory, a first ovonic threshold switch (OTS) in contact with the first intermediate electrode, and a first upper electrode disposed between the first OTS and the first bit line, the first upper electrode in contact with the first OTS and the first bit line.
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Citations
18 Claims
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1. A semiconductor device, comprising:
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a first word line extending in a first direction; a first bit line extending in a second direction that intersects the first direction, wherein the first bit line and the first word line are spaced apart from each other in a third direction that intersects the first and second directions; a mold film disposed between the first word line and the first bit line; a first memory cell disposed in the mold film and including a core hole, wherein the first memory cell comprises; a first lower electrode in contact with the first word line, wherein side surfaces of the first lower electrode are in direct contact with the mold film, a first phase-charge memory in contact with the first lower electrode, a first intermediate electrode in contact with the first phase-change memory, a first ovonic threshold switch (OTS) in contact with the first intermediate electrode, and a first upper electrode disposed between the first OTS and the first bit line, the first upper electrode in contact with the first OTS and the first bit line, wherein the core hole extends in the first direction through the first lower electrode, the first phase-change memory, the first intermediate electrode, the first OTS and the first upper electrode; a second bit line extending in the second direction, wherein the second bit line and the first bit line are spaced apart from each other in the first direction; and a second memory cell disposed between the second bit line and the first word line, wherein the second memory cell comprises; a second lower electrode disposed on the first word line, wherein side surfaces of the second lower electrode are in direct contact with the mold film, a second phase-change memory disposed on the second lower electrode, a second intermediate electrode disposed on the second phase-change memory, a second OTS disposed on the second intermediate electrode, and a second upper electrode disposed between the second OTS and the second bit line, the second upper electrode being in contact with the second OTS and the second bit line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A semiconductor device, comprising:
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a first word line extending in a first direction; a second word line extending in the first direction and disposed on the first word line, wherein the second word line is parallel to the first word line; a first bit line extending in a second direction, which intersects the first direction, and disposed between the first and second word lines; a first memory cell disposed between the first word line and the first bit line, wherein the first memory cell comprises; a first lower electrode disposed on the first word line, wherein the first lower electrode includes a first width extending in the first direction, a first phase-change memory disposed on the first lower electrode, wherein the first phase-change memory includes a second width that is greater than the first width, a first OTS disposed on the first phase-change memory, and a first upper electrode disposed between the first OTS and the first bit line; and a second memory cell disposed between the second word line and the first bit line, wherein the second memory cell comprises; a second lower electrode disposed on the first bit line, wherein the second lower electrode includes a third width extending in the second direction, a second phase-change memory disposed on the second lower electrode, wherein the second phase-change memory includes a fourth width that is greater than the third width, a second OTS disposed on the second phase-change memory, and a second upper electrode disposed between the second OTS and the second word line. - View Dependent Claims (11, 12, 13)
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14. A semiconductor device, comprising:
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a first word line extending in a first direction; a first bit line extending in a second direction crossing the first direction, wherein the first bit line is disposed above the first word line; a first memory cell disposed on the first word line and comprising; a core hole, wherein an inner mold film is disposed in the core hole, a first lower electrode disposed on the first word line and having a first height from an upper surface of the first word line, wherein the first lower electrode is in contact with the inner mold film, a first phase-change memory disposed on the first lower electrode at the first height, a first intermediate electrode disposed on the first phase-change memory, a first ovonic threshold switch (OTS) disposed on the first intermediate electrode, and a first upper electrode disposed on the first OTS; and an outer mold film surrounding the first memory cell. - View Dependent Claims (15, 16, 17, 18)
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Specification