Low capacitance switch for programmable gain amplifier or programable gain instrumentation amplifier
First Claim
1. An analog switch circuit, comprising:
- a first pass FET, including a gate coupled to a first control signal input, a first conduction terminal coupled to a signal input, a second conduction terminal coupled to a signal output, and a first body, wherein a local first semiconductor region is insulated by an underlying insulator and from the first body by a lateral insulator so as to be capable of being switchably driven independently from the first body.
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Accused Products
Abstract
A low capacitance n-channel analog switch circuit, a p-channel analog switch circuit, and a full CMOS transmission gate (T-gate) circuit are described. Resistive decoupling can be used to isolate the switch or T-gate from AC grounds. A semiconductor region that is separated from a body region of a pass field-effect transistor (FET), such as by an insulator, can be coupled to or driven to a voltage similar to the input voltage or other desired bias voltage (e.g., an operational amplifier output) to help reduce parasitic capacitance of the switch or T-gate. The switch or T-gate can help provide improved frequency bandwidth or frequency response. The switch can be useful in a programmable gain amplifier (PGA) or programmable gain instrumentation amplifier (PGIA) or other circuit in which excessive switch capacitance could degrade circuit performance.
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Citations
20 Claims
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1. An analog switch circuit, comprising:
a first pass FET, including a gate coupled to a first control signal input, a first conduction terminal coupled to a signal input, a second conduction terminal coupled to a signal output, and a first body, wherein a local first semiconductor region is insulated by an underlying insulator and from the first body by a lateral insulator so as to be capable of being switchably driven independently from the first body. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. An analog switch circuit, comprising:
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a first pass FET, including a gate coupled to a first control signal input via a first gate decoupling resistor, a first conduction terminal coupled to a signal input, a second conduction terminal coupled to a signal output, and a first body separated from a local first semiconductor region by a lateral first insulator; and a second pass FET, including a gate coupled to a second control signal input via a second gate decoupling resistor, a first conduction terminal coupled to the signal input, a second conduction terminal coupled to the signal output, and a second body separated from a local second semiconductor region by a lateral second insulator; and wherein the local first and second semiconductor regions are electrically connected to an amplifier signal output, and wherein the local first and second semiconductor regions are insulated from the first body and by an underlying insulator so as to be capable of being switchably driven independently from the first and second bodies, respectively. - View Dependent Claims (14, 15, 16)
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17. A method of using at least one first pass FET for switchably passing or isolating an analog signal from a signal input to a signal output, the method comprising:
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providing a first control signal to a gate of the at least one first pass FET to turn the at least one first pass FET on to pass the analog signal from the signal input to the signal output and to turn the at least one first pass FET off to isolate the analog signal at the signal input from the signal output; and switchably coupling or driving, to a circuit node or a bias voltage, a local first semiconductor region, separated from a body region of the at least one first pass FET by a first lateral insulator so as to be capable of being switchably coupled or driven independently from the body region, separated from other circuitry on an integrated circuit by a second insulator, and further insulated by an underlying third insulator. - View Dependent Claims (18, 19, 20)
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Specification