Phased locked loop integrated circuit

• US 10,560,109 B2
• Filed: 05/04/2018
• Issued: 02/11/2020
• Est. Priority Date: 12/29/2017
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Damphousse, Simon Jacques
• Primary Examiner(s): Gannon, Levi
• Application Number:
  US15/971,808
• Publication Number:
  US 20190207611A1
• Time in Patent Office: 648 Days
• CPC Class Codes: H03L 2207/06 Phase locked loops with a controlled oscillator having at least two frequency control terminals
• CPC Class Codes: H03L 7/07 using several loops, e.g. for redundant clock signal generation
• CPC Class Codes: H03L 7/0805 the loop being adapted to provide an additional control signal for use outside the loop
• CPC Class Codes: H03L 7/0992 comprising a counter or a frequency divider
• CPC Class Codes: H03L 7/104 using an additional signal from outside the loop for setting or controlling a parameter in the loop H03L7/107, H03L7/12 take precedence
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence
• CPC Class Codes: H03L 7/22 using more than one loop

Abstract

An integrated circuit includes phase locked loop (PLL) circuitry, voltage controlled oscillator (VCO) circuitry, and interface circuitry. The PLL circuitry includes a reference signal input terminal, a reference frequency divider circuit, a reference signal output terminal, a switch, a phase detector, a charge pump, and a control voltage output terminal. The reference frequency divider circuit is coupled to the reference signal input terminal. The switch is coupled to the reference frequency divider circuit and to the reference signal output terminal. The switch is configured to switchably connect the reference frequency divider circuit to the reference signal output terminal. The VCO circuitry includes a control voltage input terminal, a VCO, calibration circuitry, and a calibration input/output (I/O) terminal. The VCO is coupled to the control voltage input terminal. The calibration circuitry is coupled to the VCO. The calibration I/O terminal is coupled to the calibration circuitry.

Claims

1. An oscillator system, comprising:

a first integrated circuit; and

a second integrated circuit, wherein the second integrated circuit and the first integrated circuit comprise a same circuitry;

wherein each of the first integrated circuit and the second integrated circuit comprises;

phase locked loop (PLL) circuitry;

voltage controlled oscillator (VCO) circuitry; and

interface circuitry;

wherein;

the PLL circuitry of the first integrated circuit is coupled to the VCO circuitry of the second integrated circuit; and

the interface circuitry of the first integrated circuit controls calibration of the VCO circuitry of the second integrated circuit;

wherein the PLL circuitry comprises;

a reference signal input terminal;

a reference frequency divider circuit coupled to the reference signal input terminal;

a reference signal output terminal;

a switch coupled to the reference frequency divider circuit and to the reference signal output terminal, the switch configured to switchably connect the reference frequency divider circuit to the reference signal output terminal;

a phase detector coupled to the reference frequency divider circuit;

a charge pump coupled to the phase detector; and

a charge pump output terminal coupled to the charge pump.

2. An oscillator system, comprising:

a first integrated circuit; and

a second integrated circuit, wherein the second integrated circuit and the first integrated circuit comprise a same circuitry;

wherein each of the first integrated circuit and the second integrated circuit comprises;

phase locked loop (PLL) circuitry comprising;

a reference signal input terminal;

a reference frequency divider circuit;

a reference signal output terminal; and

a switch configured to switchably connect an output of the reference frequency divider circuit to the reference signal output terminal; and

voltage controlled oscillator (VCO) circuitry;

wherein;

the PLL circuitry of the first integrated circuit is coupled to the VCO circuitry of the second integrated circuit; and

the reference signal output terminal of the first integrated circuit is coupled to the reference signal input terminal of the second integrated circuit.

3. The oscillator system of claim 2, wherein the first integrated circuit is configured to close the switch during calibration of the VCO circuitry of the second integrated circuit.

4. The oscillator system of claim 2, wherein each of the first integrated circuit and the second integrated circuit comprises interface circuitry configured to communicate with an external controller, and the interface circuitry of each of the first integrated circuit and the second integrated circuit is coupled to the external controller.

5. The oscillator system of claim 4, wherein the external controller is configured to calibrate the VCO circuitry of the second integrated circuit based on a comparison of an output of the VCO circuitry of the second integrated circuit to a reference frequency by the PLL circuitry of the second integrated circuit.

6. The oscillator system of claim 2, wherein each of the first integrated circuit and the second integrated circuit comprises:

interface circuitry configured to communicate with an external controller, and calibration circuitry configured to control calibration of the VCO circuitry;

wherein;

the interface circuitry of the first integrated circuit is coupled to the external controller;

the interface circuitry of the second integrated circuit is not coupled to the external controller; and

the interface circuitry of the first integrated circuit is communicatively coupled to the calibration circuitry of the second integrated circuit.

7. The oscillator system of claim 6, wherein the calibration circuitry of the second integrated circuit is configured to calibrate the VCO circuitry of the second integrated circuit based on a comparison of an output of the VCO circuitry of the second integrated circuit to a reference frequency by the PLL circuitry of the second integrated circuit.