Method for synchronizing an active load modulation clock within a transponder, and corresponding transponder
First Claim
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1. A method, comprising:
- generating an active load modulation (ALM) carrier clock of a transponder synchronized to a carrier clock of a reader using a digital phase locked loop (DPLL), the DPLL having a frequency which is a multiple N of a frequency of the carrier clock of the reader, where N is an integer value; and
transmitting data frames from the transponder to the reader using the ALM carrier clock, the generating the ALM carrier clock including;
between transmission of data frames, placing said DPLL in a lock mode of operation in which a feedback loop is closed; and
within a transmitted data frame having a duration,placing, for the duration of the transmitted data frame, said DPLL in a hold mode of operation in which the feedback loop is opened; and
adjusting a phase of said ALM carrier clock at least one time during the duration of the transmitted data frame.
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Abstract
A transponder communicates with a reader using active load modulation. The transponder includes a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to carrier clock of the reader. Between transmission of data frames, the DPLL is placed in a lock mode of operation in which a feedback loop of the DPLL is closed. Within a transmitted data frame having a duration, the DPLL is placed, for the duration of the transmitted data frame, in a hold mode of operation in which the feedback loop is opened. A phase of the ALM carrier clock is adjusted at least once during the duration of the transmitted data frame.
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Citations
20 Claims
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1. A method, comprising:
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generating an active load modulation (ALM) carrier clock of a transponder synchronized to a carrier clock of a reader using a digital phase locked loop (DPLL), the DPLL having a frequency which is a multiple N of a frequency of the carrier clock of the reader, where N is an integer value; and transmitting data frames from the transponder to the reader using the ALM carrier clock, the generating the ALM carrier clock including; between transmission of data frames, placing said DPLL in a lock mode of operation in which a feedback loop is closed; and within a transmitted data frame having a duration, placing, for the duration of the transmitted data frame, said DPLL in a hold mode of operation in which the feedback loop is opened; and adjusting a phase of said ALM carrier clock at least one time during the duration of the transmitted data frame. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A device, comprising:
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a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to a carrier clock of a reader, the DPLL having a frequency which is a multiple N of a frequency of the carrier clock of the reader, where N is an integer value; and transmission circuitry, which, in operation, transmits data frames to the reader using the ALM carrier clock, wherein the generating the ALM carrier clock includes; between transmission of data frames, placing said DPLL in a lock mode of operation in which a feedback loop of the DPLL is closed; and within a transmitted data frame having a duration, placing, for the duration of the transmitted data frame, said DPLL in a hold mode of operation in which the feedback loop is opened; and adjusting a phase of said ALM carrier clock at least once during the duration of the transmitted data frame. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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18. A system, comprising:
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a tag reader, which, in operation, transmits a reader carrier clock; and a tag including; a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to the reader carrier clock, the DPLL having a frequency which is a multiple N of a frequency of the carrier clock of the reader, where N is an integer value; and transmission circuitry, which, in operation, transmits data frames to the reader using the ALM carrier clock, wherein the generating the ALM carrier clock includes; between transmission of data frames, placing said DPLL in a lock mode of operation in which a feedback loop of the DPLL is closed; and within a transmitted data frame having a duration, placing, for the duration of the transmitted data frame, said DPLL in a hold mode of operation in which the feedback loop is opened; and adjusting a phase of said ALM carrier clock at least once during the duration of the transmitted data frame. - View Dependent Claims (19, 20)
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Specification