Methods of lag-compensation for analyte measurements, and devices related thereto

• US 10,561,372 B2
• Filed: 10/10/2016
• Issued: 02/18/2020
• Est. Priority Date: 04/24/2012
• Status: Active Grant

• Current Assignee: Abbott Diabetes Care Incorporated (Abbott Laboratories Incorporated)
• Original Assignee: Abbott Diabetes Care Incorporated (Abbott Laboratories Incorporated)
• Inventors: Budiman, Erwin S., Li, David L.
• Primary Examiner(s): Harward, Soren
• Application Number:
  US15/289,776
• Publication Number:
  US 20170095213A1
• Time in Patent Office: 1,226 Days
• Field of Search: None
• CPC Class Codes: A61B 5/14532 for measuring glucose, e.g. by tissue impedance measurement
• CPC Class Codes: A61B 5/7203 for noise prevention, reduction or removal
• CPC Class Codes: A61B 5/7221 Determining signal validity, reliability or quality A61B5/7207 and A61B5/7217 take precedence
• CPC Class Codes: A61B 5/742 using visual displays A61B5/339 takes precedence

Abstract

In some aspects, methods of lag compensation of analyte measurements are provided. Methods of lag-compensation are provided for analyte point measurements and/or for analyte rate-of-change measurements. The methods include receiving a series of uncompensated analyte measurements and determining parameter values for analyte point and/or rate-of-change estimates based on reference analyte measurements. The analyte rate-of-change estimate is based on a sum of a plurality of scaled rates-of-changes. The analyte point estimate is based on a sum of an analyte point and a sum of a plurality of scaled rates-of-changes. Devices related to the methods are also provided.

Claims

1. A system comprising:

an on-body unit configured for positioning on a subject, the on-body unit comprising an in vivo positionable glucose sensor; and

an analyte processing unit comprising;

a processor,

a display for communicating lag compensated glucose level, wherein the lag compensated glucose level correlates with the subject'"'"'s blood glucose level at an initial reference time, and

a memory comprising machine-executable instructions stored thereon for lag compensation of glucose level measurements, the instructions when executed cause the processor to;

receive at least three uncompensated glucose measurements prior to lag compensation, wherein the three uncompensated glucose measurements including a first uncompensated glucose measurement at the initial reference time, a second uncompensated glucose measurement at a first prior reference time, and a third uncompensated glucose measurement at a second prior reference time; and

determine a first scaled rate-of-change by multiplying a first weighting coefficient on a first rate of change computed from the first uncompensated glucose measurement at the initial reference time to the second uncompensated glucose measurement at the first prior reference time and determine a second scaled rate-of-change by multiplying a second weighting coefficient on a second rate of change computed from the first uncompensated glucose measurement at the initial reference time to the second uncompensated glucose measurement at the second prior reference time; and

calculate lag-compensated glucose level measurements from the uncompensated glucose measurements by adding the first scaled rate-of-change, the second scaled rate-of-change, and the first uncompensated glucose measurement.

2. The system of claim 1, wherein the instructions when executed cause the processor to:

determine a first set of parameter values for a glucose level estimate based on at least three glucose measurements, wherein the glucose level estimate is based on a sum of;

a glucose level corresponding to measurements at the initial reference time; and

a sum of the first scaled rate-of-change and the second scaled rate-of-change.

3. The system of claim 2, where the instructions comprise:

instructions for calculating error metrics for a plurality of combinations of values as parameters in the glucose level estimate; and

instructions for selecting the first set of parameter values based on the calculated error metrics.

4. The system of claim 1, wherein the memory further comprises instructions when executed cause the processor to:

receive a fourth uncompensated glucose measurement at a third prior reference time and a fifth uncompensated measurement at a fourth prior reference time.

5. The system of claim 4, wherein the memory further comprises instructions when executed cause the processor to:

determine a third scaled rate-of-change by multiplying a third weighting coefficient on a third rate of change computed from the first uncompensated glucose measurement at the initial reference time relative to the fourth uncompensated glucose measurement at the third prior reference time; and

determine a fourth scaled rate-of-change by multiplying a fourth weighting coefficient on a fourth rate of change computed from the first uncompensated glucose measurement at the initial reference time relative to the fifth uncompensated glucose measurement at the fourth prior reference time.

6. The system of claim 5, wherein the memory further comprises instructions when executed cause the processor to:

determine whether one or more of the uncompensated glucose measurements are physiologically infeasible, invalid, or missing.

7. The system of claim 5, wherein the memory further comprises instructions when executed cause the processor to:

determine whether one or more of the uncompensated glucose measurements are physiologically infeasible, invalid, or missing, and if the second uncompensated glucose measurement or the third uncompensated glucose measurement is determined to be physiologically infeasible, invalid, or missing, the memory further comprises instructions when executed cause the processor to;

calculate a lag-compensated glucose level by adding the first uncompensated glucose measurement with;

the third scaled rate-of-change and the fourth scaled rate-of-change;

or

a fifth scaled rate-of-change and a sixth scaled rate-of-change.

8. The system of claim 7, wherein the instructions when executed cause the processor to:

calculate the lag-compensated glucose level by adding the first uncompensated glucose measurement with the third scaled rate-of-change and the fourth scaled rate-of-change.

9. The system of claim 7, wherein the instructions when executed cause the processor to:

calculate the lag-compensated glucose level by adding the first uncompensated glucose measurement with the fifth scaled rate-of-change and the sixth scaled rate-of-change.

10. The system of claim 5, wherein the memory further comprises instructions when executed cause the processor to:

determine whether one or more of the uncompensated glucose measurements are physiologically infeasible, invalid, or missing, and if the fourth uncompensated glucose measurement or the fifth uncompensated glucose measurement is determined to be physiologically infeasible, invalid, or missing, the memory further comprises instructions when executed cause the processor to;

calculate a lag-compensated glucose level by adding the first uncompensated glucose measurement with;

the first scaled rate-of-change and the second scaled rate-of-change;

or

a fifth scaled rate-of-change and a sixth scaled rate-of-change.

11. The system of claim 7, wherein the memory further comprises instructions when executed cause the processor to

determine whether one or more the first scaled rate-of-change, the second scaled rate-of-change, the third scaled rate-of-change, the fourth scaled rate-of-change, the fifth scaled rate-of-change, and the sixth scaled rate-of-change are physiologically infeasible.

12. The system of claim 11, wherein the physiologically infeasible rate of change is indicative of a dropout.

13. The system of claim 4, wherein the memory further comprises instructions when executed cause the processor to:

calculate a lag-compensated glucose level from the uncompensated glucose measurements by adding the first uncompensated glucose measurement with the third scaled rate-of-change and the fourth scaled rate-of-change.

14. The system of claim 13, wherein the memory further comprises instructions when executed cause the processor to:

calculate the lag-compensated glucose level by averaging a first lag-compensated glucose level and a second lag-compensated glucose level;

where the first lag-compensated glucose level is the sum of the first uncompensated glucose measurement, the first scaled rate-of-change, and the second scaled rate-of-change; and

where the second lag-compensated glucose level is the sum of the first uncompensated glucose measurement, the third scaled rate-of-change, and the fourth scaled rate-of-change.

15. The system of claim 1, wherein the memory further comprises instructions when executed cause the processor to:

calculate a lag-compensated glucose level by adding the first uncompensated glucose measurement with the first scaled rate-of-change and the second scaled rate-of-change.

16. The system of claim 15, wherein the memory further comprises instructions when executed cause the processor to:

calculate a lag-compensated glucose level by adding the first uncompensated glucose measurement with a fifth scaled rate-of-change and a sixth scaled rate-of-change.

17. The system of claim 16, wherein if a sixth uncompensated glucose measurement or a seventh uncompensated glucose measurement is determined to be physiologically infeasible, invalid, or missing, the memory further comprises instructions when executed cause the processor to:

calculate a lag-compensated glucose level by adding the first uncompensated glucose measurement with;

the first scaled rate-of-change and the second scaled rate-of-change;

or

the third scaled rate-of-change and the fourth scaled rate-of-change.

18. The system of claim 17, wherein the memory further comprises instructions when executed cause the processor to:

calculate a lag-compensated glucose level by adding the first uncompensated glucose measurement with the first scaled rate-of-change and the second scaled rate-of-change.

19. The system of claim 18, wherein the memory further comprises instructions when executed cause the processor to:

calculate a lag-compensated glucose level by adding the first uncompensated glucose measurement with the third scaled rate-of-change and the fourth scaled rate-of-change.

20. The system of claim 1, wherein the memory further comprises instructions when executed cause the processor to:

determine an alternate first uncompensated glucose measurement at an alternate initial reference time.

21. The system of claim 20, wherein the alternate initial reference time is offset with respect to the initial reference time by a time delay.