Systems and methods for anisotropic material breakthrough

• US 10,566,206 B2
• Filed: 12/27/2016
• Issued: 02/18/2020
• Est. Priority Date: 12/27/2016
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Pandit, Mandar, Ingle, Nitin
• Primary Examiner(s): Vinh, Lan
• Application Number:
  US15/390,955
• Publication Number:
  US 20180182633A1
• Time in Patent Office: 1,148 Days
• Field of Search: 438706, 438710, 438712, 438714, 438719, 438723, 438736, 216 57, 216 72, 216 74
• CPC Class Codes: H01J 37/32357 Generation remote from the workpiece, e.g. down-stream
• CPC Class Codes: H01J 37/32422 Arrangement for selecting ions or species in the plasma
• CPC Class Codes: H01J 37/32449 Gas control, e.g. control of the gas flow
• CPC Class Codes: H01L 21/02079 Cleaning for reclaiming
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching

Abstract

Processing methods may be performed to remove unwanted materials from a substrate, such as a native oxide material. The methods may include forming an inert plasma within a processing region of a processing chamber. Effluents of the inert plasma may be utilized to modify a surface of an exposed material on a semiconductor substrate within the processing region of the semiconductor chamber. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified surface of the exposed material from the semiconductor substrate.

Claims

1. An etching method comprising:

generating an inert plasma from an inert precursor within a processing region of a semiconductor processing chamber;

modifying a surface of an exposed material on a semiconductor substrate within the processing region of the semiconductor processing chamber with effluents of the inert plasma;

subsequent the modifying, forming a remote plasma from a fluorine-containing precursor to produce plasma effluents;

flowing the plasma effluents to the processing region of the semiconductor processing chamber with a hydrogen-containing precursor that has bypassed the remote plasma;

removing the modified surface of the exposed material from the semiconductor substrate with the plasma effluents of the fluorine-containing precursor; and

annealing modified material remaining subsequent the etching operation, wherein the annealing comprises contacting the modified material with an inert gas heated to a temperature above a temperature of the substrate.

2. The etching method of claim 1, wherein the inert plasma comprises a hydrogen plasma.

3. The etching method of claim 1, wherein the inert plasma is formed from a bias power below about 100 W.

4. The etching method of claim 1, wherein the surface of the exposed material on the semiconductor substrate is modified to a depth from the exposed surface within the semiconductor substrate of less than about 5 nm.

5. The etching method of claim 1, wherein a pressure within the semiconductor processing chamber while forming the inert plasma and during the modifying is maintained below about 500 mTorr.

6. The etching method of claim 1, wherein the remote plasma is formed in a region of the semiconductor processing chamber fluidly isolated from the processing region of the semiconductor processing chamber or is formed in a remote plasma unit fluidly coupled with the semiconductor processing chamber.

7. The etching method of claim 1, wherein the exposed material on the semiconductor substrate comprises an oxide material located proximate a polysilicon material positioned along the semiconductor substrate.

8. The etching method of claim 1, wherein each operation of the etching method is repeated in at least one additional cycle, and wherein a total removal after all cycles is less than 10 nm.

9. The etching method of claim 1, wherein the semiconductor substrate is maintained at a temperature above or about 80°

C. during the removal of the modified surface of the exposed material.

10. The etching method of claim 9, wherein removing the modified surface of the exposed material exposes an unmodified portion of the material, and wherein an etching selectivity of a modified portion of the material to the unmodified portion of the material is greater than or about 100:

1.

11. An etching method comprising:

igniting an inert plasma within a processing region of a semiconductor processing chamber;

modifying an exposed region of silicon oxide on a semiconductor substrate within the processing region of the semiconductor processing chamber with effluents of the inert plasma;

subsequent the modifying, forming a plasma of a fluorine-containing precursor to produce plasma effluents, wherein the plasma of the fluorine-containing precursor is formed remotely from the processing region of the semiconductor processing chamber;

contacting the modified silicon oxide with plasma effluents of a fluorine-containing precursor;

etching the modified silicon oxide, wherein the modifying, contacting, and etching are all performed in the semiconductor processing chamber, and wherein the etching is performed at a temperature above about 70°

C.; and

annealing modified silicon oxide remaining subsequent the etching operation, wherein the annealing comprises contacting the modified silicon oxide with an inert gas heated to a temperature above a temperature of the substrate.

12. The etching method of claim 11, wherein the etching is performed at a temperature of about 90°

C.

13. The etching method of claim 11, wherein the plasma effluents of the fluorine-containing precursor are formed in a remote region of the semiconductor processing chamber fluidly coupled with, and physically separated from, the processing region of the semiconductor processing chamber.

14. The etching method of claim 13, wherein the plasma effluents of the fluorine-containing precursor are produced by a capacitively-coupled plasma at a power level of less than or about 100 W.

15. The etching method of claim 13, wherein the modified silicon oxide is additionally contacted with a hydrogen-containing precursor.

16. The etching method of claim 15, wherein the hydrogen-containing precursor bypasses the remote region of the semiconductor processing chamber, and wherein the hydrogen-containing precursor interacts with the plasma effluents of the fluorine-containing precursor subsequent to the plasma effluents of the fluorine-containing precursor exiting the remote region of the semiconductor processing chamber.

17. An etching method comprising:

forming an inert plasma within a processing region of a semiconductor processing chamber, wherein the inert plasma comprises a hydrogen plasma formed by a bias power of less than 100 W;

modifying an exposed region of silicon oxide on a semiconductor substrate within the processing region of the semiconductor processing chamber with effluents of the inert plasma, wherein the exposed region of silicon oxide comprises a material positioned about a silicon mandrel, wherein a pressure within the semiconductor processing chamber is maintained below about 1 Torr during the modifying;

forming a plasma of a fluorine-containing precursor in a remote region of the semiconductor processing chamber that is separated from the processing region of the semiconductor processing chamber by a showerhead;

contacting the modified silicon oxide with plasma effluents of the fluorine-containing precursor; and

etching the modified silicon oxide at a temperature of about 90°

C., wherein the modifying, contacting, and etching are all performed in the semiconductor processing chamber, and wherein no solid byproducts are produced during the etching.

18. The etching method of claim 17, wherein the remote region of the semiconductor processing chamber is a region defined within the semiconductor processing chamber.

19. The etching method of claim 17, further comprising annealing modified silicon oxide remaining subsequent the etching operation, wherein the annealing comprises contacting the modified silicon oxide with an inert gas heated to a temperature above a temperature of the substrate.