Semiconductor device having a first region comprising silicon, oxygen and at least one metal element formed between an oxide semiconductor layer and an insulating layer

• US 10,566,459 B2
• Filed: 10/27/2017
• Issued: 02/18/2020
• Est. Priority Date: 10/30/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Miyanaga, Akiharu, Takahashi, Masahiro, Kishida, Hideyuki, Sakata, Junichiro
• Primary Examiner(s): Mai, Anh D
• Application Number:
  US15/795,736
• Publication Number:
  US 20180053857A1
• Time in Patent Office: 844 Days
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/42364 characterised by the insulating layer, e.g. thickness or uniformity H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a semiconductor device including an oxide semiconductor with stable electric characteristics can be provided. An insulating layer having many defects typified by dangling bonds is formed over an oxide semiconductor layer with an oxygen-excess mixed region or an oxygen-excess oxide insulating layer interposed therebetween, whereby impurities in the oxide semiconductor layer, such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H₂O), are moved through the oxygen-excess mixed region or oxygen-excess oxide insulating layer and diffused into the insulating layer. Thus, the impurity concentration of the oxide semiconductor layer is reduced.

Claims

1. A semiconductor device comprising:

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer;

a source electrode layer and a drain electrode layer, each of the source electrode layer and the drain electrode layer being in contact with the oxide semiconductor layer;

a first insulating layer over the source electrode layer and the drain electrode layer, the first insulating layer comprising oxygen and silicon;

a first region between the oxide semiconductor layer and the first insulating layer; and

a second insulating layer covering the first insulating layer,

wherein the first region comprises oxygen, silicon and at least one of metal elements included in the oxide semiconductor layer,

wherein the gate insulating layer comprises a first layer and a second layer over the first layer,

wherein the first layer is a nitride layer and the second layer is an oxide layer,

wherein the first insulating layer is in contact with a top surface of the second layer of the gate insulating layer, and

wherein the second insulating layer is a nitride layer and in contact with a top surface of the first layer of the gate insulating layer.

2. A semiconductor device according to claim 1, wherein the first region is in oxygen-excess state.

3. A semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium, gallium and zinc.

4. The semiconductor device according to claim 1,

wherein the first insulating layer has defects, and

wherein the first insulating layer is configured to bind and stabilize an impurity diffused from the oxide semiconductor layer.

5. A semiconductor device according to claim 1, wherein a thickness of the first region is 0.1 nm to 30 nm.

6. A semiconductor device comprising:

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate insulating layer;

a source electrode layer and a drain electrode layer, each of the source electrode layer and the drain electrode layer being in contact with the oxide semiconductor layer;

a first insulating layer over the source electrode layer and the drain electrode layer, the first insulating layer comprising oxygen and silicon;

a first region between the oxide semiconductor layer and the first insulating layer; and

a second insulating layer covering the first insulating layer,

wherein the oxide semiconductor layer comprises indium, gallium and zinc,

wherein the first region comprises indium, gallium, zinc, and silicon,

wherein the gate insulating layer comprises a first layer and a second layer over the first layer,

wherein the first insulating layer is in contact with a top surface of the second layer of the gate insulating layer, and

wherein the second insulating layer is a nitride layer and in contact with a top surface of the first layer of the gate insulating layer.

7. A semiconductor device according to claim 6, wherein the first region is in oxygen-excess state.

8. The semiconductor device according to claim 6,

wherein the first insulating layer has defects, and

wherein the first insulating layer is configured to bind and stabilize an impurity diffused from the oxide semiconductor layer.

9. A semiconductor device according to claim 6, wherein a thickness of the first region is 0.1 nm to 30 nm.