Power stage overdrive extender for area optimization and operation at low supply voltage

• US 10,566,892 B1
• Filed: 02/06/2019
• Issued: 02/18/2020
• Est. Priority Date: 02/06/2019
• Status: Active Grant

• Current Assignee: Dialog Semiconductor UK Ltd (Renesas Electronics Corporation)
• Original Assignee: Dialog Semiconductor UK Ltd (Renesas Electronics Corporation)
• Inventors: Dias, Nuno
• Primary Examiner(s): Le, Dinh T
• Application Number:
  US16/268,641
• Time in Patent Office: 377 Days
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/071 adapted to generate a negative voltage output from a positive voltage source
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors

Abstract

It is an object of one or more embodiments of the present disclosure to provide a power stage overdrive circuit, at low supply voltages, that can be enabled/disabled on the fly. The power stage overdrive circuit increases the overdrive of a power switch to allow for simple power stage architecture with high voltage PMOS and NMOS devices. The power stage overdrive circuit comprises a driver, configured to drive the power switch having a control terminal, for example a gate terminal, and a boost circuit, further comprising a boost capacitor having a first terminal coupled to a power supply, for example a battery, and a second terminal coupled to the control terminal, configured to provide an overdrive voltage to the control terminal to turn the power switch on.

Claims

1. A power stage overdrive circuit, comprising:

a gate driver output stage, configured to drive a power switch at a control terminal;

a boost circuit,

comprising a boost capacitor having a first terminal coupled to a power supply, and a second terminal coupled to the control terminal,

configured to provide an overdrive voltage to the control terminal to turn the power switch on; and

a charge pump coupled to the control terminal, the charge pump configured to operate to maintain the power switch below saturation level.

2. The power stage overdrive circuit of claim 1, further comprising a plurality of switches coupled to the boost capacitor, the plurality of switches configured to operate between a first phase and a second phase to adjust a control terminal voltage, wherein in the first phase an amplitude of the control terminal voltage is configured to increase towards a first value, and in the second phase the amplitude of the control terminal voltage is configured to increase further to reach the overdrive voltage.

3. The power stage overdrive circuit of claim 1, wherein the charge pump comprises a negative charge pump.

4. The power stage overdrive circuit of claim 1, wherein the power switch comprises a MOS transistor, and wherein the boost capacitor is about 1/10th of a total gate capacitance of the MOS transistor.

5. The power stage overdrive circuit of claim 1, wherein the power switch comprises a high side PMOS transistor, and wherein the overdrive voltage is a negative voltage.

6. The power stage overdrive circuit of claim 1, wherein the power switch comprises a low side NMOS transistor, and wherein the overdrive voltage is a positive voltage.

7. The power stage overdrive circuit of claim 2, wherein the plurality of switches coupled to the boost capacitor is configured for a one-cycle overdrive boost, for a low supply voltage and high-frequency operation.

8. The power stage overdrive circuit of claim 1, wherein the charge pump coupled to the control terminal is configured for several microseconds of overdrive regulation.

9. The power stage overdrive circuit of claim 1, wherein the power switch is configured for a boosted gate drive voltage in a switching converter.

10. The power stage overdrive circuit of claim 1, wherein the power switch is configured for a signal conditioning circuit.

11. The power stage overdrive circuit of claim 10, wherein the signal conditioning circuit is a switched-capacitor sampling circuit or chopper.

12. A method for overdriving a circuit element, comprising the steps of:

providing a gate driver output stage;

driving a power switch at a control terminal;

providing a boost capacitor coupled to a power supply and said control terminal;

overdriving the control terminal, using said boost capacitor, to turn the power switch on; and

operating a charge pump to maintain the power switch below saturation level.

13. The method of claim 12, further comprising a plurality of switches operating between a first phase and a second phase to adjust a control terminal voltage, wherein in the first phase an amplitude of the control terminal voltage increases towards a first value, and in the second phase the amplitude of the control terminal voltage increases further to reach an overdrive voltage.

14. The method of claim 13, wherein the plurality of switches coupled to the boost capacitor operates for a one-cycle overdrive boost, for a low supply voltage and high-frequency operation.

15. The method of claim 12, wherein the charge pump coupled to the control terminal operates for several microseconds of overdrive regulation.