Optimized scan interval

• US 10,573,357 B2
• Filed: 12/21/2018
• Issued: 02/25/2020
• Est. Priority Date: 08/31/2017
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Muchherla, Kishore Kumar, Malshe, Ashutosh, Singidi, Harish Reddy, Alsasua, Gianni Stephen, Besinga, Gary F., Ratnam, Sampath, Feeley, Peter Sean
• Primary Examiner(s): Dinh, Son T
• Application Number:
  US16/230,251
• Publication Number:
  US 20190122705A1
• Time in Patent Office: 431 Days
• Field of Search: 36518914, 36518915
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 2216/14 Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory
• CPC Class Codes: G11C 2216/22 Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/023 in clock generator or timing circuitry
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/12015 comprising clock generation or timing circuitry
• CPC Class Codes: G11C 29/20 using counters or linear-feedback shift registers [LFSR]
• CPC Class Codes: G11C 29/50004 of threshold voltage
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 7/1006 Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
• CPC Class Codes: G11C 8/10 Decoders

Abstract

A variety of applications can include apparatus and/or methods of operating the apparatus that include a memory device having read levels that can be calibrated. A calibration controller implemented with the memory device can trigger a read level calibration based on inputs from one or more trackers monitoring parameters associated with the memory device and a determination of an occurrence of at least one event from a set of events related to the monitored parameters. The monitored parameters can include parameters related to a selected time interval and measurements of read, erase, or write operations of the memory device. Additional apparatus, systems, and methods are disclosed.

Claims

1. A system comprising:

a processing circuit;

a memory device to receive read and write commands to read from and write to memory cells of an array of memory cells of the memory device; and

firmware having stored instructions, executable by the processing circuit, to perform operations, the operations including operations to trigger read calibration of the memory device by use of input/output operations per second sampling in addition to time based sampling.

2. The system of claim 1, wherein the input/output operations per second sampling includes operations to track a number of read operations directed to the memory device and to track at least one of a number of write operations in the memory device and a number of erase operations in the memory device.

3. The system of claim 1, wherein the input/output operations per second sampling has a sampling time defined by the time based sampling.

4. The system of claim 1, wherein the operations to trigger the read calibration include a determination that a number of read operations, directed to the memory device, is equal to or exceeds a threshold for a number of read operations within a selected time interval.

5. The system of claim 1, wherein the operations to trigger the read calibration include a determination that at least one of a number of write operations in the memory device and a number of erase operations in the memory device is equal to or exceeds a threshold for at least one of write operations and erase operations within a selected time interval.

6. The system of claim 1, wherein the operations to trigger the read calibration include a determination that a monitored time is equal to or exceeds a selected time interval with the input/output operations per second sampling being within threshold limits for the entire selected time interval.

7. The system of claim 1, wherein times to begin monitor of the samplings for time intervals to trigger another read calibration are resettable after a triggered read calibration to reset values.

8. The system of claim 7, wherein the time intervals are equal to a time interval between scheduled read calibrations with the time interval between scheduled read calibrations set based on a user usage model.

9. The system of claim 1, wherein the triggered read calibration includes a sampling of memory raw bit error rates at different read voltages to select a set of read voltages associated with a least raw bit error rate.

10. The system of claim 1, wherein the operations include operations to track memory cell threshold voltage movement of the memory cells under stress conditions.

11. A system comprising:

a processing circuit;

a memory device to receive read and write commands to read from and write to memory cells of an array of memory cells of the memory device;

firmware having stored instructions, executable by the processing circuit, to perform operations, the operations including operations to trigger read calibration of the memory device by use of input/output operations per second sampling in addition to time based sampling; and

management firmware having stored instructions, executable by the processing circuit, to perform operations, the operations including operations to direct management tasks of the memory device.

12. The system of claim 11, wherein the operations to trigger the read calibration include a trigger based on one of a determination that a number of read operations, directed to the memory device, is equal to or exceeds a threshold for a number of read operations within a selected time interval, a determination that at least one of a number of write operations in the memory device and a number of erase operations in the memory device is equal to or exceeds a threshold for at least one of write operations and erase operations within the selected time interval, or a determination that a monitored time is equal to or exceeds the selected time interval with the input/output operations per second sampling being within threshold limits for the entire selected time interval.

13. The system of claim 12, wherein the selected time interval is equal to a time interval between scheduled read calibrations with the time interval between scheduled read calibrations set based on a user usage model.

14. The system of claim 12, wherein the sampling for the input/output operations per second sampling and the sampling for the time based sampling is resettable after a triggered read calibration to reset time values to begin a monitor of the determinations for the selected time interval to trigger another read calibration.

15. The system of claim 11, wherein the memory device is a three-dimensional NAND memory device and the management tasks include generation of scans of the three-dimensional NAND memory device and garbage collection in the three-dimensional NAND memory device.

16. A method comprising:

performing, using a processing circuit, time based sampling of a memory device, the memory device structured to receive read and write commands to read from and write to memory cells of an array of memory cells of the memory device;

performing, using the processing circuit, input/output operations per second sampling of the memory device in addition to the time based sampling; and

triggering a read calibration of the memory device using the input/output operations per second sampling in addition to the time based sampling.

17. The method of claim 16, wherein performing the input/output operations per second sampling includes tracking a number of read operations directed to the memory device and tracking at least one of a number of write operations in the memory device and a number of erase operations in the memory device, with a sampling time defined by the time based sampling.

18. The method of 16, wherein triggering the read calibration includes determining that a number of read operations, directed to the memory device, is equal to or exceeds a threshold for a number of read operations within a selected time interval or determining that at least one of a number of write operations in the memory device and a number of erase operations in the memory device is equal to or exceeds a threshold for at least one of write operations and erase operations within the selected time interval.

19. The method of 16, wherein triggering the read calibration includes determining that a monitored time is equal to or exceeds a selected time interval with the input/output operations per second sampling being within threshold limits for the entire selected time interval.

20. The method of 16, wherein the method includes resetting times to begin monitor of the samplings for time intervals to trigger another read calibration after a triggered read calibration.