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  • US 10,573,357 B2
  • Filed: 12/21/2018
  • Issued: 02/25/2020
  • Est. Priority Date: 08/31/2017
  • Status: Active Grant
First Claim
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1. A system comprising:

  • a processing circuit;

    a memory device to receive read and write commands to read from and write to memory cells of an array of memory cells of the memory device; and

    firmware having stored instructions, executable by the processing circuit, to perform operations, the operations including operations to trigger read calibration of the memory device by use of input/output operations per second sampling in addition to time based sampling.

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