Semiconductor structures including liners comprising alucone and related methods

• US 10,573,513 B2
• Filed: 08/23/2016
• Issued: 02/25/2020
• Est. Priority Date: 02/25/2014
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Song, Zhe, Allen, Tuman E., Franklin, Cole S., Gealy, F. Daniel
• Primary Examiner(s): Peterson, Erik T. K.
• Application Number:
  US15/244,629
• Publication Number:
  US 20160365514A1
• Time in Patent Office: 1,281 Days
• CPC Class Codes: H01L 21/02118 carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC polymers per se C08G, photoresist per se G03F
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/02362 formation of intermediate layers, e.g. capping layers or diffusion barriers
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels
• CPC Class Codes: H10B 63/20 comprising selection components having two electrodes, e.g. diodes
• CPC Class Codes: H10B 63/24 of the Ovonic threshold switching type
• CPC Class Codes: H10N 70/021 Formation of the switching material, e.g. layer deposition
• CPC Class Codes: H10N 70/063 by etching of pre-deposited switching material layers, e.g. lithography
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/235 between different crystalline phases, e.g. cubic and hexagonal
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8413 adapted for resistive heating
• CPC Class Codes: H10N 70/882 Compounds of sulfur, selenium or tellurium, e.g. chalcogenides

Abstract

A semiconductor device including stacked structures. The stacked structures include at least two chalcogenide materials or alternating dielectric materials and conductive materials. A liner including alucone is formed on sidewalls of the stacked structures. Methods of forming the semiconductor device are also disclosed.

Claims

1. A semiconductor device, comprising:

stack structures comprising a first chalcogenide material over a material and a second chalcogenide material over the first chalcogenide material; and

a liner over sidewalls of at least a portion of the stack structures, the liner comprising a first portion comprising aluminum oxide in contact with the sidewalls of the stack structures and a second portion comprising alucone over the first portion, the second portion further comprising silicon atoms, nitrogen atoms, or a combination thereof.

2. The semiconductor device of claim 1, wherein the liner comprises a gradient of alucone and aluminum oxide over the sidewalls of the stack structures.

3. The semiconductor device of claim 1, wherein the liner comprises a ratio of aluminum oxide to alucone of from about 1:

1 to about 1;

10.

4. The semiconductor device of claim 1, wherein the liner overlies an entirety of the sidewalls.

5. The semiconductor device of claim 1, wherein the liner further comprises a third portion between the first portion and the second portion, the third portion comprising a greater amount of alucone than the first portion.

6. The semiconductor device of claim 1, wherein adjacent stack structures of the stack structures are separated from each other by a distance of between about 20 nm and about 60 nm.

7. A semiconductor device, comprising:

stack structures comprising at least one chalcogenide material over a material; and

a liner comprising a first portion comprising aluminum oxide contacting opposing sidewalls of the stack structures and a second portion comprising alucone over the first portion.

8. The semiconductor device of claim 7, wherein the liner has a thickness of between about 5 Å

and about 30 Å

.

9. The semiconductor device of claim 7, further comprising a charge trapping material over the liner.

10. The semiconductor device of claim 7, wherein the liner comprises a gradient of alucone, a concentration of alucone increasing from about zero percent at a portion of the liner proximal the stack structures to about one-hundred percent at a portion of the liner distal from the stack structures.

11. A method of forming a semiconductor device, the method comprising:

forming stack structures over a material, forming the stack structures comprising forming a first chalcogenide material over the material and forming a second chalcogenide material over the first chalcogenide material;

forming aluminum oxide over and in contact with sidewalls of the stack structures; and

forming alucone over the aluminum oxide.

12. The method of claim 11, wherein forming alucone over the aluminum oxide comprises forming the alucone to exhibit a gradient of alucone and aluminum oxide.