Horizontal gate all around device isolation
First Claim
Patent Images
1. A method of forming a semiconductor device, comprising:
- forming a superlattice structure on a substrate, wherein the superlattice structure comprises;
a silicon containing material layer;
a first silicon germanium material layer having a first germanium content; and
a second silicon germanium material layer having a second germanium content greater than the first germanium content of the first silicon germanium material layer;
etching the superlattice structure;
depositing a liner on the superlattice structure;
depositing an oxide material layer on the substrate after depositing the liner; and
oxidizing one of the first material layer, the second material layer, or the third material layer to form a buried oxide layer after depositing the oxide material layer, wherein the liner selectively prevents oxidation of two of the material layers preferentially to the material layer which forms the buried oxide.
1 Assignment
0 Petitions
Accused Products
Abstract
Embodiments described herein generally relate to methods and apparatus for horizontal gate all around (hGAA) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. The different materials may be silicon containing materials and one or more III/V materials. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate.
-
Citations
19 Claims
-
1. A method of forming a semiconductor device, comprising:
-
forming a superlattice structure on a substrate, wherein the superlattice structure comprises; a silicon containing material layer; a first silicon germanium material layer having a first germanium content; and a second silicon germanium material layer having a second germanium content greater than the first germanium content of the first silicon germanium material layer; etching the superlattice structure; depositing a liner on the superlattice structure; depositing an oxide material layer on the substrate after depositing the liner; and oxidizing one of the first material layer, the second material layer, or the third material layer to form a buried oxide layer after depositing the oxide material layer, wherein the liner selectively prevents oxidation of two of the material layers preferentially to the material layer which forms the buried oxide. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A method of forming a semiconductor device, comprising:
-
forming a superlattice structure on a substrate, wherein the superlattice structure comprises; a silicon material layer; a low germanium content silicon germanium material layer; and a high germanium content silicon germanium material layer; etching the superlattice structure; depositing a nitride liner on the superlattice structure; depositing an oxide material layer on the substrate; and oxidizing the high germanium content silicon germanium material layer to form a buried oxide layer, wherein the nitride liner selectively prevents oxidation of the silicon material layer and the low germanium content silicon germanium layer. - View Dependent Claims (12, 13, 14, 15, 16)
-
-
17. A method of forming a semiconductor device, comprising:
-
forming a superlattice structure on a substrate, wherein the superlattice structure comprises; a silicon material layer; a first silicon germanium material layer comprising about 30% germanium; and a second silicon germanium material layer comprising about 70% germanium, wherein the silicon material layer, the first silicon germanium material layer, and the second silicon germanium layer are disposed in a stacked arrangement; depositing a nitride liner on the superlattice structure; depositing an oxide material layer on the substrate; and oxidizing the second silicon germanium material layer to form a buried oxide layer, wherein the nitride liner selectively prevents oxidation of the silicon material layer and the first silicon germanium material layer. - View Dependent Claims (18, 19)
-
Specification