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Horizontal gate all around device isolation

  • US 10,573,719 B2
  • Filed: 09/28/2016
  • Issued: 02/25/2020
  • Est. Priority Date: 05/11/2015
  • Status: Active Grant
First Claim
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1. A method of forming a semiconductor device, comprising:

  • forming a superlattice structure on a substrate, wherein the superlattice structure comprises;

    a silicon containing material layer;

    a first silicon germanium material layer having a first germanium content; and

    a second silicon germanium material layer having a second germanium content greater than the first germanium content of the first silicon germanium material layer;

    etching the superlattice structure;

    depositing a liner on the superlattice structure;

    depositing an oxide material layer on the substrate after depositing the liner; and

    oxidizing one of the first material layer, the second material layer, or the third material layer to form a buried oxide layer after depositing the oxide material layer, wherein the liner selectively prevents oxidation of two of the material layers preferentially to the material layer which forms the buried oxide.

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