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Electric power converter

  • US 10,574,130 B2
  • Filed: 05/22/2019
  • Issued: 02/25/2020
  • Est. Priority Date: 05/23/2018
  • Status: Active Grant
First Claim
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1. An electric power converter comprising a plurality of branches, each branch comprising one or more series connected switch units, each switch unit comprising a controllable switch and a diode connected in antiparallel to the controllable switch, the converter comprising a first stage, a second stage and a third stage, the first, second and third stages being connected in series, wherein:

  • the first stage comprises a first positive branch connected between a first output node and a first positive input node, and a first negative branch connected between the first output node and a first negative input node,the second stage comprises;

    a positive cell, the positive cell comprising a second positive end branch connected between the first positive input node and a second positive input node, and a second positive intermediate branch connected between the first positive input node and a second intermediate input node,a negative cell, the negative cell comprising a second negative intermediate branch connected between the first negative input node and the second intermediate input node, and a second negative end branch connected between the first negative input node and a second negative input node,a second positive capacitor connected between the second positive input node and the second intermediate input node, and a second negative capacitor connected between the second intermediate input node and the second negative input node,the third stage comprises;

    a third positive branch connected between the second positive input node and a third positive input node,a third intermediate branch connected between the second intermediate input node and a third intermediate input node,a third negative branch connected between the second negative input node and a third negative input node,a third positive capacitor connected between the third positive input node and the third intermediate input node, and a third negative capacitor connected between the third intermediate input node and the third negative input node.

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