Sampler offset calibration during operation

• US 10,574,487 B1
• Filed: 04/08/2019
• Issued: 02/25/2020
• Est. Priority Date: 04/08/2019
• Status: Active Grant

• Current Assignee: Kandou Labs, SA
• Original Assignee: Kandou Labs, SA
• Inventors: Hormati, Ali
• Primary Examiner(s): Kim, Kevin
• Application Number:
  US16/378,450
• Time in Patent Office: 323 Days
• CPC Class Codes: H04L 2025/0349 as a feedback filter
• CPC Class Codes: H04L 2025/03624 Zero-forcing
• CPC Class Codes: H04L 25/03063 using fractionally spaced delay lines or combinations of fractionally and integrally spaced taps
• CPC Class Codes: H04L 25/03076 not using decision feedback
• CPC Class Codes: H04L 25/03146 with a recursive structure H04L25/03127 takes precedence

Abstract

Methods and systems are described for sampling a data signal using a data sampler operating in a data signal processing path having a decision threshold associated with a decision feedback equalization (DFE) correction factor, measuring an eye opening of the data signal by adjusting a decision threshold of a spare sampler operating outside of the data signal processing path to determine a center-of-eye value for the decision threshold of the spare sampler, initializing the decision threshold of the spare sampler based on the center-of-eye value and the DFE correction factor, generating respective sets of phase-error signals for the spare sampler and the data sampler responsive to a detection of a predetermined data pattern, and updating the decision threshold of the data sampler based on an accumulation of differences in phase-error signals of the respective sets of phase-error signals.

Claims

1. A method comprising:

sampling a data signal using a data sampler operating in a data signal processing path having a decision threshold associated with a decision feedback equalization (DFE) correction factor;

measuring an eye opening of the data signal by adjusting a decision threshold of a spare sampler operating outside of the data signal processing path to determine a center-of-eye value for the decision threshold of the spare sampler;

initializing the decision threshold of the spare sampler based on the center-of-eye value and the DFE correction factor;

generating respective sets of phase-error signals for the spare sampler and the data sampler responsive to a detection of a predetermined data pattern; and

updating the decision threshold of the data sampler based on an accumulation of differences in phase-error signals of the respective sets of phase-error signals.

2. The method of claim 1, further comprising updating the decision threshold of the spare sampler responsive to the accumulation of differences in phase-error signals of the respective sets of phase-error signals.

3. The method of claim 2, wherein the decision threshold of the spare sampler is updated until the accumulation of differences in phase-error signals of the respective sets of phase-error signals is within a threshold.

4. The method of claim 3, further comprising determining an offset correction value between the updated decision threshold of the spare sampler and the initialized decision threshold of the spare sampler.

5. The method of claim 4, wherein the decision threshold of the data sampler is updated based on the offset correction value.

6. The method of claim 5, wherein the decision threshold of the data sampler is updated by a single step in a direction determined by the offset correction value.

7. The method of claim 5, wherein the decision threshold of the data sampler is updated in a direction and magnitude determined by the offset correction value.

8. The method of claim 1, further comprising comparing the respective sets of phase-error signals to determine the accumulation of differences between the respective sets of phase-error signals.

9. The method of claim 1, wherein the differences between the respective sets of phase-error signals are accumulated in a register.

10. The method of claim 9, wherein a least significant bit (LSB) is updated in the register responsive to a determination of a difference between a pair of phase-error signals, each phase-error signal of the pair of phase-error signals selected from one of the respective sets of phase-error signals.

11. An apparatus comprising:

a data sampler operating in a data signal processing path having a decision threshold associated with a decision feedback equalization (DFE) correction factor, the data sampler configured to sample a data signal;

a spare sampler operating outside of the data signal processing path configured to measure an eye opening of the data signal by adjusting a decision threshold of to determine a center-of-eye value for the decision threshold of the spare sampler;

a DFE-tap generator configured to provide the DFE correction factor to the eye-scope sampler to initialize the decision threshold of the spare sampler;

the data sampler and spare sampler configured to generate respective sets of phase-error signals responsive to a detection of a predetermined data pattern; and

an accumulator configured to update the decision threshold of the data sampler based on an accumulation of differences in phase-error signals of the respective sets of phase-error signals.

12. The apparatus of claim 11, wherein the decision of the spare sampler is updated responsive to the accumulation of differences in phase-error signals of the respective sets of phase-error signals.

13. The apparatus of claim 12, wherein the decision threshold of the spare sampler is updated until the accumulation of differences in phase-error signals of the respective sets of phase-error signals is within a predetermined threshold.

14. The apparatus of claim 13, further comprising control logic configured to determine an offset correction value between the updated decision threshold of the spare sampler and the initialized decision threshold of the spare sampler.

15. The apparatus of claim 14, wherein the decision threshold of the data sampler is updated based on the offset correction value.

16. The apparatus of claim 15, wherein the control logic is configured to update the decision threshold of the data sampler by a single step in a direction determined by the offset correction value.

17. The apparatus of claim 15, wherein the control logic is configured to update the decision threshold of the data sampler in a direction and magnitude determined by the offset correction value.

18. The apparatus of claim 11, wherein the accumulator is configured to compare phase-error signals in the respective sets of phase-error signals that are obtained at corresponding sampling instants to accumulate differences between the respective sets of phase-error signals.

19. The apparatus of claim 11, wherein the accumulator comprises a register configured to maintain the accumulation of differences between the respective sets of phase-error signals.

20. The apparatus of claim 19, wherein the register is configured to update a least significant bit (LSB) responsive to a determination of a difference between a pair of phase-error signals selected from the respective sets of phase-error signals.