Self-emissive display with switchable retarder for high contrast

• US 10,576,081 B2
• Filed: 12/31/2015
• Issued: 03/03/2020
• Est. Priority Date: 08/20/2015
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Chang, Shih Chang, Chen, Cheng, Lin, Chin-Wei, Nam, Donghee, Ho, Meng-Huan, Choi, Minhyuk, Liu, Rui
• Primary Examiner(s): Ghebretinsae, Temesghen
• Assistant Examiner(s): Abebe, Sosina
• Application Number:
  US14/986,148
• Publication Number:
  US 20170053602A1
• Time in Patent Office: 1,524 Days
• CPC Class Codes: A61K 31/513 having oxo groups directly attached to the heterocyclic ring, e.g. cytosine
• CPC Class Codes: G09G 2300/023 Display panel composed of stacked panels
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2320/066 for control of contrast
• CPC Class Codes: G09G 3/3208 organic, e.g. using organic light-emitting diodes [OLED]
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

Systems and electronic displays with improved contrast even under bright-light conditions are provided. Such an electronic display may include a self-emissive pixel (e.g., OLED or μ-LED) with a corresponding liquid crystal switchable retarder pixel. A liquid crystal layer of the switchable retarder pixel may be tuned to an “on” state or an “off” state. In the “on” state, the switchable retarder pixel may allow outside light that enters the pixel to reflect back out of the pixel. This may add to the amount of light that appears to be emitted from that pixel. In the “off” state, the switchable retarder pixel may block the outside light that enters the pixel from reflecting back out of the pixel. This may reduce the amount of light that appears to be emitted from that pixel. Selectively controlling the switchable retarder pixels may allow for increased contrast even under bright-light conditions.

Claims

1. An electronic display comprising:

a plurality of self-emissive pixels configured to emit first light out of the electronic display based on image data provided to the electronic display;

a plurality of switchable retarder pixels, each of the plurality of switchable retarder pixels corresponding to one of the plurality of self-emissive pixels, the plurality of switchable retarder pixels configured to selectively exclude and permit second light that enters a corresponding self-emissive pixel of the electronic display from outside of the electronic display to be emitted back out of the corresponding self-emissive pixel of the electronic display along with the first light.

2. The electronic display of claim 1, wherein a first portion of the plurality of switchable retarder pixels are in a first state to exclude the second light while a second portion of the plurality of switchable retarder pixels are in a second state to include the second light.

3. The electronic display of claim 1, wherein each of the plurality of self-emissive pixels comprises a micro light emitting diode, an organic light emitting diode, or combination thereof.

4. The electronic display of claim 1, wherein each of the plurality of switchable retarder pixels comprises a liquid crystal pixel.

5. The electronic display of claim 4, wherein the liquid crystal pixel is configured to operate as a quarter-wave plate that causes the second light to have a polarization upon exiting the electronic display that is orthogonal to the polarization upon entering the electronic display.

6. The electronic display of claim 1, wherein each of the plurality of switchable retarder pixels is configured to operate in two states:

an “

on”

state that permits the second light to be emitted back out of the electronic display; and

an “

off”

state that does not permit the second light to be emitted back out of the electronic display.

7. The electronic display of claim 6, wherein each of the plurality of switchable retarder pixels is configured to operate only in the two states.

8. The electronic display of claim 1, comprising a polarizer layer configured to cause the second light to have a first polarization, wherein each of the plurality of switchable retarder pixels is configured to selectively cause the second light to have the first polarization and to have a second polarization, wherein the second polarization is orthogonal to the first polarization, whereby the polarizer layer emits the second light when the second light has the first polarization but blocks the second light when the second light has the second polarization.

9. A system comprising:

a processor configured to generate image data for an electronic display;

an array of self-emissive pixels configured to display the image data; and

an array of switchable retarder pixels, each of the array of switchable retarder pixels corresponding to one of the array of self-emissive pixels, each of the array of switchable retarder pixels configured to;

when in a first state, permit outside light that enters the corresponding self-emissive pixel of the electronic display from outside of the electronic display to contribute to the corresponding self-emissive pixel of the array of self-emissive pixels; and

when in a second state, block the outside light from contributing to the corresponding self-emissive pixel of the array of self-emissive pixels.

10. The system of claim 9, comprising control circuitry configured to control whether a state of each of the switchable retarder pixels of the array of switchable retarder pixels is the first state or the second state.

11. The system of claim 10, wherein the control circuitry is configured to enter a first mode that causes all of the switchable retarder pixels of the array of switchable retarder pixels to enter the first state when the array of self-emissive pixels is emitting light and when the array of self-emissive pixels is not emitting light.

12. The system of claim 10, wherein the control circuitry is configured to enter a second mode that causes each of the switchable retarder pixels of the array of switchable retarder pixels to enter:

the first state only when the corresponding self-emissive pixel of the array of self-emissive pixels is emitting light; and

the second state when the corresponding self-emissive pixel of the array of self-emissive pixels is not emitting light.

13. The system of claim 10, wherein the control circuitry is configured to enter a second mode that causes each of the switchable retarder pixels of the array of switchable retarder pixels to enter:

the first state only when the corresponding self-emissive pixel of the array of self-emissive pixels is emitting light of a brightness or a gray level, or both, above a threshold level; and

the second state only when the corresponding self-emissive pixel of the array of self-emissive pixels is not emitting light of a brightness or a gray level, or both, above a threshold level.

14. The system of claim 9, wherein the array of switchable retarder pixels are configured to be operated in only the first state and the second state.

15. An electronic display comprising:

an array of combined self-emissive pixels and switchable retarder pixels, each of the switchable retarder pixels corresponding to one of the self-emissive pixels of the array of combined self-emissive pixels and switchable retarder pixels, each combined pixel comprising;

a polarizing layer;

a liquid crystal switchable retarder comprising;

a pixel electrode;

a common electrode; and

a liquid crystal layer configured to be tuned to two states;

an “

on”

state that does not substantially alter a polarization of light that passes through the liquid crystal layer; and

an “

off”

state that does substantially alter the polarization of light that passes through the liquid crystal layer; and

the self-emissive pixel configured to emit a variable amount of light;

wherein;

when the liquid crystal layer is tuned to the “

on”

state, light that has entered the combined pixel from outside the electronic display passes through the liquid crystal layer a first time, reflects off of a light-reflective structure inside the combined pixel, passes through the liquid crystal layer a second time, and is permitted to exit by the polarizing layer; and

when the liquid crystal layer is tuned to the “

off”

state, light that has entered the combined pixel from outside the electronic display passes through the liquid crystal layer the first time, reflects off of the light-reflective structure inside the combined pixel, passes through the liquid crystal layer the second time, and is blocked from exiting by the polarizing layer.

16. The electronic display of claim 15, wherein the liquid crystal layer has a thickness configured to enable operation as a quarter-wave plate.

17. The electronic display of claim 15, wherein, when the liquid crystal layer is tuned to the “

off”

state, the light that has entered the combined pixel from outside the combined pixel;

becomes polarized in a parallel polarization that is parallel to a transmissive axis of the polarizing layer upon passing through the polarizing layer from outside the combined pixel;

becomes circularly polarized in a first orientation upon passing through the liquid crystal layer the first time;

becomes circularly polarized in a second orientation opposite the first orientation upon reflecting off of the light-reflective structure inside the combined pixel;

becomes polarized in an orthogonal polarization that is orthogonal to the transmissive axis of the polarizing layer; and

is blocked from exiting by the polarizing layer at least in part because of the orthogonal polarization.

18. The electronic display of claim 15, wherein the liquid crystal layer is configured to be tuned only to the two states.

19. The electronic display of claim 15, wherein the light-reflective structure comprises a component of the self-emissive pixel.

20. The electronic display of claim 15, wherein the light-reflective structure comprises a scattering structure configured to scatter light that reflects off of the light-reflective structure.

21. The electronic display of claim 15, wherein the light-reflective structure comprises a light lens configured to direct at least some light toward other parts of the combined pixel when the light arrives at the light lens substantially perpendicularly to a face of the electronic display.

22. The electronic display of claim 15, wherein each combined pixel comprises a color filter that substantially matches a color of light emitted by the self-emissive pixel of that combined pixel.

23. The electronic display of claim 22, wherein the color filter of at least one of the combined pixels comprises a window configured to permit light to pass without substantially filtering the light by color, thereby allowing more light that has entered from outside the combined pixel to reach the light-reflective structure.

24. A system comprising:

an electronic display that includes an array of self-emissive pixels configured to display an image based on image data and an array of switchable retarder pixels, each of the array of switchable retarder pixels corresponding to a ratio of the array of self-emissive pixels, the array of switchable retarder pixels configured to block at least some outside light that enters from outside of the electronic display from contributing to dark pixels of the image when the electronic display is operating in a high-contrast mode and to allow the at least some outside light that enters from outside of the electronic display to contribute to the dark pixels of the image when the electronic display is not operating in the high-contrast mode; and

a processor configured to generate the image data and determine whether to operate the electronic display in the high-contrast mode.

25. The system of claim 24, wherein pixels of the array of switchable retarder pixels corresponds in a 1:

1 ratio with pixels of the array of self-emissive pixels.

26. The system of claim 24, wherein pixels of the array of switchable retarder pixels corresponds in a ratio with pixels of the array of self-emissive pixels greater than 1:

1.

27. The system of claim 26, wherein pixels of the array of switchable retarder pixels corresponds in a 1:

3 ratio with pixels of the array of self-emissive pixels.

28. The system of claim 24, wherein the processor is configured to operate the electronic display in the high-contrast mode based on an indication that the system is in a bright-ambient-light environment.

29. The system of claim 28, comprising an ambient light sensor configured to detect a level of ambient light, wherein the processor is configured to operate the electronic display in the high-contrast mode when the level of ambient light exceeds a threshold.

30. The system of claim 28, wherein the processor is configured to operate the electronic display in the high-contrast mode based at least in part on an indication that the system is being used out of doors.