Chipset reconfiguration based on device detection

• US 10,585,673 B2
• Filed: 02/10/2015
• Issued: 03/10/2020
• Est. Priority Date: 02/10/2015
• Status: Active Grant

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Inventors: Nguyen, Vincent, Phu, Hung Quoc
• Primary Examiner(s): Myers, Paul R.
• Application Number:
  US15/545,628
• Publication Number:
  US 20180011716A1
• Time in Patent Office: 1,855 Days
• Field of Search: 710301-304, 710 10
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: G06F 11/3034 where the computing system component is a storage system, e.g. DASD based or network based digital input from or digital output to record carriers G06F3/06; digital recording or reproducing G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/3041 where the computing system component is an input/output interface interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units G06F13/00
• CPC Class Codes: G06F 11/3051 Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs verification or detection of system hardware configuration G06F11/2247
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G06F 9/4411 Configuring for operating with peripheral devices; Loading of device drivers
• CPC Class Codes: G06F 9/4418 Suspend and resume; Hibernate and awake

Abstract

Example implementations relate to chipset reconfiguration based on device detection. For example, a method includes detecting, by a computing system, that a storage device is connected to an input/output (I/O) interface of the computing system, and reconfiguring a chipset of the computing system based on the detected storage device. The method also includes performing a power cycle on chipset standby power to trigger a chipset configuration reload.

Claims

1. A method, comprising:

detecting, by a computing system, that a storage device is connected to an input/output (I/O) interface of the computing system;

reconfiguring, by the computing system, a chipset I/O interconnect configuration of the computing system in response to the detected storage device; and

performing, by the computing system, a power cycle on chipset standby power to trigger a chipset configuration reload.

2. The method of claim 1, wherein performing the power cycle on chipset standby power comprises updating I/O interface mappings upon occurrence of a subsequent power-on sequence of the computing system.

3. The method of claim 1, wherein reconfiguring the chipset comprises reconfiguring firmware configuration bits of the chipset.

4. The method of claim 1, wherein detecting that the storage device is connected to the I/O interface comprises determining a type of the storage device connected to the I/O interface.

5. The method of claim 4, wherein determining the type of the storage device includes using inter-integrated circuit (I2C) buses for determining the type of storage device connected to the I/O interface.

6. The method of claim 5, wherein determining the type of storage device is performed during a standby mode or a running mode of the computing system.

7. The method of claim 5, wherein the storage device is communicatively coupled to the computing system directly or via a field replaceable unit (FRU).

8. The method of claim 1, wherein the I/O interface is selected from the group consisting of at least a serial ATA (SATA), serial ATA express (SATAe), fibre channel, small computer system interface (SCSI), serial attached SCSI, M.2, and peripheral component interconnect express (PCIe).

9. A computing system, comprising:

a storage device detection module to detect a storage device connected to an input/output (I/O) port of the computing system and to determine a type of the storage device;

a chipset management module to reconfigure a chipset I/O interconnect configuration of the computing system in response to the detected storage device; and

a power cycle module to perform a power cycle on chipset standby power to trigger a chipset configuration reload.

11. The computing system of claim 9, the storage device detection module to determine the type of the storage device using inter-integrated circuit (I2C) busses connected to the computing system.

12. The computing system of claim 11, wherein the storage device is communicatively coupled to the computing system directly or via a field replaceable unit (FRU).

13. The computing system of claim 9, wherein the I/O port is selected from the group consisting of at least a serial ATA (SATA), SATA express (SATAe), fibre channel, small computer system interface (SCSI), serial attached SCSI, M.2, and peripheral component interconnect express (PCIe).

10. The computing system of 9, the power cycle module is further to update I/O port mappings upon an occurrence of a subsequent power-on sequence of the computing system.

14. A non-transitory computer-readable storage medium encoded with instructions executable by a processor of a computing system, the computer-readable storage medium comprising instructions to:

detect that a storage device is connected to an input/output (I/O) interface of the computing system;

reconfigure a chipset I/O interconnect configuration of the computing system in response to the detected storage device; and

perform a power cycle on chipset standby power to trigger a chipset configuration reload and to update I/O interface mappings upon an occurrence of a subsequent power-on sequence of the computing system.

15. The non-transitory computer-readable storage medium of claim 14, wherein instructions to detect that the storage device is connected to the I/O interface comprises instructions to determine a type of the storage device.