Multiplexed type driver circuit, driving method and display

• US 10,586,500 B2
• Filed: 10/21/2018
• Issued: 03/10/2020
• Est. Priority Date: 04/27/2018
• Status: Active Grant

• Current Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
• Original Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
• Inventors: Liu, Linfeng
• Primary Examiner(s): Karimi, Pegeman
• Application Number:
  US16/166,137
• Publication Number:
  US 20190333457A1
• Time in Patent Office: 506 Days
• CPC Class Codes: G09G 2300/0452 Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
• CPC Class Codes: G09G 2300/0804 Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2320/0242 Compensation of deficiencies in the appearance of colours
• CPC Class Codes: G09G 3/3607 for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor

Abstract

The present disclosure provides a multiplexed type driver circuit, a driving method, and a display. The driver circuit may include: a fourth switch couple to a first switch and a first sub-pixel, a fifth switch couple to a second switch and a second sub-pixel, a sixth switch couple to a third switch and a third sub-pixel. The driving method may include: controlling ON and OFF of the first switch to input a data signal to the first sub-pixel; controlling ON and OFF of the second switch to input a data signal to the second sub-pixel; controlling ON of the third switch and OFF of the sixth switch to input a data signal to the third sub-pixel; and turning off the third switch after turning off the sixth switch. The durations of data signal input to the first sub-pixel, the second sub-pixel and the third sub-pixel are identical.

Claims

1. A multiplexed type driver circuit, applied to a display, comprising a plurality of scan signal lines, a plurality of data signal lines, and arrayed sub-pixels defined by the plurality of scan lines and the plurality of data lines;

the multiplexed type driver circuit further comprising;

a first switch, a second switch and a third switch, each of which comprising an input end configured to input a data signal and an output end;

a fourth switch comprising an input end coupled to the output end of the first switch and an output end coupled to a first sub-pixel;

a fifth switch comprising an input end coupled to the output end of the second switch and an output end coupled to a second sub-pixel; and

a sixth switch comprising an input end coupled to the output end of the third switch and an output end coupled to a third sub-pixel;

wherein the first sub-pixel, the second sub-pixel and the third sub-pixel are in a same pixel unit, the first sub-pixel is a red sub-pixel, the second sub-pixel is a green sub-pixel and the third sub-pixel is a blue sub-pixel, the first switch, the second switch, the third switch, the fourth switch, the fifth switch and the sixth switch are N-type field effect transistors;

wherein the multiplexed type driver circuit performs the driving in the following manner;

turning on the fourth switch, the fifth switch and the sixth switch;

controlling ON and OFF of the first switch to input a data signal to the first sub-pixel;

controlling ON and OFF of the second switch to input a data signal to the second sub-pixel;

controlling ON of the third switch and OFF of the sixth switch to input a data signal to the third sub-pixel; and

turning off the third switch after turning off the sixth switch;

wherein the durations of data signals input to the first sub-pixel, the second sub-pixel and the third sub-pixel are identical;

wherein each cycle of the data signals comprises a first sub-cycle, a second sub-cycle and a third sub-cycle in sequence;

the first switch is turned on at the start of the first sub-cycle, and turned off before the end of the first sub-cycle;

the second switch is turned on at the start of the second sub-cycle, and turned off before the end of the second sub-cycle; and

the third switch is turned on at the start of the third sub-cycle, and the sixth switch is turned off before the end of the third sub-cycle;

or

the first switch is turned on after the start of the first sub-cycle, and turned off at the end of the first sub-cycle;

the second switch is turned on after the start of the second sub-cycle, and turned off at the end of the second sub-cycle; and

the third switch is turned on at the start of the third sub-cycle, and the sixth switch is turned off before the end of the third sub-cycle;

or

the first switch is turned on at the start of the first sub-cycle, and turned off at the end of the first sub-cycle;

the second switch is turned on at the start of the second sub-cycle, and turned off at the end of the second sub-cycle; and

the third switch is turned on before the start of the third sub-cycle, and the sixth switch is turned off before the end of the third sub-cycle;

or

the first switch is turned on at the start of the first sub-cycle, and turned off at the end of the first sub-cycle;

the second switch is turned on before the start of the second sub-cycle, and turned off before the end of the second sub-cycle; and

the third switch is turned on before the start of the third sub-cycle, and the sixth switch is turned off before the end of the third sub-cycle.

2. The multiplexed type driver circuit according to claim 1, wherein the first switch comprises a control end for inputting a first control signal to control ON and OFF of the first switch, the second switch comprises a control end for inputting a second control signal to control ON and OFF of the second switch, and the third switch comprises a control end for inputting a third control signal to control ON and OFF of the third switch, and

each of the fourth switch, the fifth switch and the sixth switch comprises a control end, the control end of the fourth switch, the control end of the fifth switch and the control end of the sixth switch input a same scan driving signal to simultaneously control ON and OFF of the fourth switch, the fifth switch and the sixth switch.

3. A method for driving a multiplexed type driver circuit, wherein the multiplexed type driver circuit comprises:

a first switch, a second switch and a third switch, each of which comprising an input end configured to input a data signal and an output end;

a fourth switch comprising an input end coupled to the output end of the first switch and an output end coupled to a first sub-pixel;

a fifth switch comprising an input end coupled to the output end of the second switch and an output end coupled to a second sub-pixel; and

a sixth switch comprising an input end coupled to the output end of the third switch and an output end coupled to a third sub-pixel;

wherein the first sub-pixel, the second sub-pixel and the third sub-pixel are in a same pixel unit;

wherein the driving method comprises;

turning on the fourth switch, the fifth switch and the sixth switch;

controlling ON and OFF of the first switch to input a data signal to the first sub-pixel;

controlling ON and OFF of the second switch to input a data signal to the second sub-pixel;

controlling ON of the third switch and OFF of the sixth switch to input a data signal to the third sub-pixel; and

turning off the third switch after turning off the sixth switch;

wherein the durations of data signal input to the first sub-pixel, the second sub-pixel and the third sub-pixel are identical;

wherein each cycle of the data signals comprises a first sub-cycle, a second sub-cycle and a third sub-cycle in sequence;

the controlling ON and OFF of the first switch comprises;

turning on the first switch at the start of the first sub-cycle and turning off the first switch before the end of the first sub-cycle;

the controlling ON and OFF of the second switch comprises;

turning on the second switch at the start of the second sub-cycle and turning off the second switch before the end of the second sub-cycle; and

the controlling ON of the third switch and OFF of the sixth switch comprises;

turning on the third switch at the start of the third sub-cycle, and turning off the sixth switch before the end of the third sub-cycle;

or

the controlling ON and OFF of the first switch comprises;

turning on the first switch after the start of the first sub-cycle and turning off the first switch at the end of the first sub-cycle;

the controlling ON and OFF of the second switch comprises;

turning on the second switch after the start of the second sub-cycle and turning off the second switch at the end of the second sub-cycle; and

the controlling ON of the third switch and OFF of the sixth switch comprises;

turning on the third switch at the start of the third sub-cycle, and turning off the sixth switch before the end of the third sub-cycle;

or

the controlling ON and OFF of the first switch comprises;

turning on the first switch at the start of the first sub-cycle and turning off the first switch at the end of the first sub-cycle;

the controlling ON and OFF of the second switch comprises;

turning on the second switch at the start of the second sub-cycle and turning off the second switch at the end of the second sub-cycle; and

the controlling ON of the third switch and OFF of the sixth switch comprises;

turning on the third switch before the start of the third sub-cycle, and turning off the sixth switch before the end of the third sub-cycle;

or

the controlling ON and OFF of the first switch comprises;

turning on the first switch at the start of the first sub-cycle and turning off the first switch at the end of the first sub-cycle;

the controlling ON and OFF of the second switch comprises;

turning on the second switch before the start of the second sub-cycle and turning off the second switch before the end of the second sub-cycle; and

the controlling ON of the third switch and OFF of the sixth switch comprises;

turning on the third switch before the start of the third sub-cycle, and turning off the sixth switch before the end of the third sub-cycle.

4. The method according to claim 3, wherein the first switch comprises a control end for inputting a first control signal to control ON and OFF of the first switch, the second switch comprises a control end for inputting a second control signal to control ON and OFF of the second switch, and the third switch comprises a control end for inputting a third control signal to control ON and OFF of the third switch ;

and

each of the fourth switch, the fifth switch and the sixth switch comprises a control end, the control end of the fourth switch, the control end of the fifth switch and the control end of the sixth switch input a same scan driving signal to simultaneously control ON and OFF of the fourth switch, the fifth switch and the sixth switch.

5. The method according to claim 3, wherein the first sub-pixel is a red sub-pixel, the second sub-pixel is a green sub-pixel and the third sub-pixel is a blue sub-pixel.

6. The method according to claim 3, wherein the first switch, the second switch, the third switch, the fourth switch, the fifth switch and the sixth switch are N-type field effect transistors.

7. A display, comprising a multiplexed type driver circuit, the multiplexed type driver circuit comprising:

a first switch, a second switch and a third switch, each of which comprising an input end configured to input a data signal and an output end; and

a fourth switch comprising an input end coupled to the output end of the first switch and an output end coupled to a first sub-pixel;

a fifth switch comprising an input end coupled to the output end of the second switch and an output end coupled to a second sub-pixel; and

a sixth switch comprising an input end coupled to the output end of the third switch and an output end coupled to a third sub-pixel;

wherein the first sub-pixel, the second sub-pixel and the third sub-pixel are in a same pixel unit,

wherein the multiplexed type driver circuit performs the driving in the following manner;

turning on the fourth switch, the fifth switch and the sixth switch;

controlling ON and OFF of the first switch to input a data signal to the first sub-pixel;

controlling ON and OFF of the second switch to input a data signal to the second sub-pixel;

controlling ON of the third switch and OFF of the sixth switch to input a data signal to the third sub-pixel; and

turning off the third switch after turning off the sixth switch;

wherein the durations of data signal input to the first sub-pixel, the second sub-pixel and the third sub-pixel are identical;

wherein each cycle of the data signals comprises a first sub-cycle, a second sub-cycle and a third sub-cycle in sequence;

the first switch is turned on at the start of the first sub-cycle, and turned off before the end of the first sub-cycle;

the second switch is turned on at the start of the second sub-cycle, and turned off before the end of the second sub-cycle; and

the third switch is turned on at the start of the third sub-cycle, and the sixth switch is turned off before the end of the third sub-cycle;

or

the first switch is turned on after the start of the first sub-cycle, and turned off at the end of the first sub-cycle;

the second switch is turned on after the start of the second sub-cycle, and turned off at the end of the second sub-cycle; and

the third switch is turned on at the start of the third sub-cycle, and the sixth switch is turned off before the end of the third sub-cycle;

or

the first switch is turned on at the start of the first sub-cycle, and turned off at the end of the first sub-cycle;

the second switch is turned on at the start of the second sub-cycle, and turned off at the end of the second sub-cycle; and

the third switch is turned on before the start of the third sub-cycle, and the sixth switch is turned off before the end of the third sub-cycle;

or

the first switch is turned on at the start of the first sub-cycle, and turned off at the end of the first sub-cycle;

the second switch is turned on before the start of the second sub-cycle, and turned off before the end of the second sub-cycle; and

the third switch is turned on before the start of the third sub-cycle, and the sixth switch is turned off before the end of the third sub-cycle.

8. The display to claim 7, wherein the first switch comprises a control end for inputting a first control signal to control ON and OFF of the first switch, the second switch comprises a control end for inputting a second control signal to control ON and OFF of the second switch, and the third switch comprises a control end for inputting a third control signal to control ON and OFF of the third switch, and

each of the fourth switch, the fifth switch and the sixth switch comprises a control end, the control end of the fourth switch, the control end of the fifth switch and the control end of the sixth switch input a same scan driving signal to simultaneously control ON and OFF of the fourth switch, the fifth switch and the sixth switch.