Display device having different types of transistors

• US 10,586,815 B2
• Filed: 12/14/2018
• Issued: 03/10/2020
• Est. Priority Date: 04/08/2016
• Status: Active Grant

• Current Assignee: InnoLux Corporation
• Original Assignee: InnoLux Corporation
• Inventors: Lee, KuanFeng
• Primary Examiner(s): Jahan, Bilkis
• Application Number:
  US16/220,634
• Publication Number:
  US 20190172853A1
• Time in Patent Office: 452 Days
• Field of Search: None
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1237 with a different composition, shape, layout or thickness of the gate insulator in different devices
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs

Abstract

A display device includes: a substrate; a first gate electrode disposed on the substrate; a gate insulating layer disposed on the first gate electrode; a first active layer disposed on the gate insulating layer and including a polysilicon layer; a second gate electrode disposed on the gate insulating layer; a first insulating layer disposed on the second gate electrode; a second active layer disposed on the first insulating layer and including a metal oxide layer; a first source electrode, a first drain electrode, a second source electrode, and a second drain electrode, wherein the first source and drain electrodes are disposed on the first insulating layer and electrically connect to the first active layer, and the second source and drain electrodes are disposed on the second active layer and electrically connect to the second active layer; and a display medium layer disposed on the substrate.

Claims

1. A display device, comprising:

a substrate;

a first gate electrode disposed on the substrate;

a gate insulating layer disposed on the substrate and the first gate electrode;

a first active layer disposed on the gate insulating layer and corresponding to the first gate electrode, wherein the first active layer comprises a polysilicon layer;

a second gate electrode disposed on the gate insulating layer;

a first insulating layer disposed on the first active layer and the second gate electrode;

a second active layer disposed on the first insulating layer and corresponding to the second gate electrode, wherein the second active layer comprises a metal oxide layer;

a first source electrode, a first drain electrode, a second source electrode, and a second drain electrode, wherein the first source electrode and the first drain electrode are disposed on the first insulating layer and electrically connect to the first active layer, and the second source electrode and the second drain electrode are disposed on the second active layer and electrically connect to the second active layer;

wherein, the first gate electrode, the gate insulating layer, the first active layer, the first insulating layer, the first source electrode and the first drain electrode form a first transistor, the second gate electrode, the first insulating layer, the second active layer, the second source electrode and the second drain electrode form a second transistor; and

a display medium layer disposed on the substrate.

2. The display device of claim 1, wherein the display device comprises a display region and a periphery region outside the display region, the first transistor is disposed in the periphery region, and the second transistor is disposed in the display region.

3. The display device of claim 1, wherein the gate insulating layer comprises a bottom gate insulating layer and a top gate insulating layer, the bottom gate insulating layer is disposed between the substrate and the top gate insulating layer, the bottom gate insulating layer comprises silicon nitride, and the top gate insulating layer comprises silicon oxide.

4. The display device of claim 1, wherein the first insulating layer comprises a first bottom insulating layer and a first top insulating layer, the first bottom insulating layer is disposed between the gate insulating layer and the first top insulating layer, the first bottom insulating layer comprises silicon nitride, and the first top insulating layer comprises silicon oxide.

5. The display device of claim 1, wherein the second gate electrode comprises polysilicon.

6. The display device of claim 5, further comprising a scan line disposed on the first insulating layer, wherein the scan line electrically connects to the second gate electrode through a via.

7. The display device of claim 1, wherein the polysilicon layer comprises a source region, a drain region and a channel region, the channel region is disposed between the source region and the drain region, and the source region and the drain region electrically connect to the first source electrode and the first drain electrode, respectively.