Half-bridge circuit for a sensor

• US 10,591,318 B2
• Filed: 08/31/2017
• Issued: 03/17/2020
• Est. Priority Date: 08/31/2017
• Status: Active Grant

• Current Assignee: Invensense Incorporated (TDK Corporation)
• Original Assignee: Invensense Incorporated (TDK Corporation)
• Inventors: Moreno Galbis, Pablo, Chen, Du, Wang, Stanley Bo-Ting
• Primary Examiner(s): Reisner, Noam
• Application Number:
  US15/693,107
• Publication Number:
  US 20190063957A1
• Time in Patent Office: 929 Days
• CPC Class Codes: G01C 19/5776 Signal processing not specific to any of the devices covered by groups G01C19/5607 - G01C19/5719
• CPC Class Codes: G01D 5/24 by varying capacitance
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G01P 21/00 Testing or calibrating of apparatus or devices covered by the preceding groups

Abstract

A circuit includes a sensor and a half-bridge circuit. The sensor includes a first sensor capacitor and a second sensor capacitor, where capacitances of the first sensor capacitor and the second sensor capacitor change in opposing directions responsive to receiving a physical signal. The sensor generates a plurality of sensor signals according to the physical signal, the plurality of signals including a common mode injection and a plurality of differential signals. The half-bridge circuit includes a first half-bridge capacitor and a second half-bridge capacitor, where capacitances of the first half-bridge capacitor and the second half-bridge capacitor compensate for the common mode injection of the plurality of sensor signals. The sensor and the half-bridge circuit are coupled to a plurality of sense nodes configured to output the plurality of differential signals.

Claims

1. A circuit comprising:

a sensor comprising a first sensor capacitor and a second sensor capacitor, wherein capacitances of the first sensor capacitor and the second sensor capacitor change in opposing directions responsive to receiving a physical signal, the sensor generating a plurality of sensor signals according to the physical signal and a plurality of drive signals, the plurality of sensor signals comprising a common mode injection and a plurality of differential signals;

a half-bridge circuit coupled to the sensor, the half-bridge circuit comprising a first half-bridge capacitor and a second half-bridge capacitor, wherein capacitances of the first half-bridge capacitor and the second half-bridge capacitor compensate for the common mode injection of the plurality of sensor signals;

a plurality of sense nodes coupled to the sensor and the half-bridge circuit, the sense nodes configured to output the plurality of differential signals; and

a half-bridge trimming circuit coupled to the plurality of sense nodes, the half-bridge trimming circuit configured to determine a difference between a sum of the capacitances of the first half-bridge capacitor and the second half-bridge capacitor and a sum of the capacitances of the first sensor capacitor and the second sensor capacitor.

2. The circuit of claim 1, wherein a sum of the capacitances of the first half-bridge capacitor and the second half-bridge capacitor are substantially equal to a sum of the capacitances of the first sensor capacitor and the second sensor capacitor.

3. The circuit of claim 1,

wherein the capacitances of the first half-bridge capacitor and the second half-bridge capacitor are electronically controlled such that the difference between the sum of the capacitances of the first half-bridge capacitor and the second half-bridge capacitor and the sum of the capacitances of the first sensor capacitor and the second sensor capacitor is substantially zero.

4. The circuit of claim 3, wherein the half-bridge trimming circuit comprises:

a plurality of switches for shorting outputs of the plurality of sense nodes; and

a sense amplifier for receiving shorted outputs of the plurality of sense nodes, wherein the sense amplifier is configured to determine a difference between the sum of the capacitances of the first half-bridge capacitor and the second half-bridge capacitor and the sum of the capacitances of the first sensor capacitor and the second sensor capacitor based on the shorted outputs of the plurality of sensing nodes.

5. The circuit of claim 1, further comprising:

a first drive node for driving a voltage of the first sensor capacitor and the second sensor capacitor; and

a second drive node for driving a voltage of the first half-bridge capacitor and the second half-bridge capacitor, wherein the first drive node and the second drive node are driven with opposite phases.

6. The circuit of claim 5, further comprising:

a shield node coupled through a capacitor to the first drive node; and

a shield coupling compensation capacitor coupled to the shield node and the second drive node, the shield coupling compensation capacitor for compensating a charge injection into the shield node from the first drive node.

7. The circuit of claim 6, further comprising:

a shield coupling compensation capacitor trimming circuit coupled to the shield node and configured to determine a ripple voltage on the shield node caused by the charge injection, wherein a capacitance of the shield coupling compensation capacitor is electronically controlled such that the ripple voltage on the shield is substantially zero.

8. The circuit of claim 5, further comprising:

a drive node to ground coupling compensation capacitor for compensating for a difference in voltage slopes of the first drive node and the second drive node.

9. The circuit of claim 8, further comprising:

a drive node to ground coupling compensation capacitor trimming circuit coupled to the first drive node and the second drive node, the drive node to ground coupling compensation capacitor trimming circuit configured to determine the difference in slopes of the first drive node and the second drive node;

wherein a capacitance of the drive node to ground coupling compensation capacitor is electronically controlled such that the difference in slopes of the first drive node and the second drive node is substantially zero.

10. The circuit of claim 9, wherein the drive node to ground coupling compensation capacitor trimming circuit comprises:

a logic circuit coupled to the first and second drive node;

wherein an output of the logic circuit is a pulse having a width proportional to the difference in slopes of the first and second drive nodes.

11. The circuit of claim 10, wherein the logic circuit comprises:

a first logic coupled to the first drive node;

a second logic coupled to the second drive node; and

a third logic coupled to the first logic and the second logic;

wherein the logic circuit is configured for activation responsive to receiving an enable/disable signal.

12. The circuit of claim 1, wherein the sensor is a microelectromechanical (MEMS) sensor.

13. The circuit of claim 1, wherein the half-bridge circuit is implemented in CMOS.

14. A method for compensating for common mode injection of a circuit comprising a sensor, the method comprising:

responsive to receiving a physical signal at the sensor comprising a first sensor capacitor and a second sensor capacitor, changing capacitances of the first sensor capacitor and the second sensor capacitor, wherein the capacitances of the first sensor capacitor and the second sensor capacitor change in opposing directions;

generating a plurality of sensor signals at the sensor according to the physical signal, a plurality of drive signals, and the capacitances of the first sensor capacitor and the second sensor capacitor, the plurality of sensor signals comprising a common mode injection and a plurality of differential signals; and

compensating for the common mode injection of the plurality of sensor signals using a half-bridge circuit coupled to the sensor, the half-bridge circuit comprising a first half-bridge capacitor and a second half-bridge capacitor, wherein capacitances of the first half-bridge capacitor and the second half-bridge capacitor compensate for the common mode injection of the plurality of sensor signals, the compensating comprising;

determining, at a half-bridge trimming circuit, a difference between a sum of the capacitances of the first half-bridge capacitor and the second half-bridge capacitor and a sum of the capacitances of the first sensor capacitor and the second sensor capacitor.

15. The method of claim 14, further comprising:

injecting the plurality of sensor signals into a first sense node and a second sense node of the circuit, wherein the first sensor capacitor and the first half-bridge capacitor are coupled to the first sense node and the second sensor capacitor and the second half-bridge capacitor are coupled to the second sense node.

16. The method of claim 15, wherein the compensating for the common mode injection of the plurality of sensor signals using a half-bridge circuit coupled to the sensor comprises:

subtracting the common mode injection from the plurality of sensor signals at a first sense node and a second sense node.

17. The method of claim 14, further comprising:

receiving a first drive signal of the plurality of drive signals at a drive node of the sensor; and

receiving a second drive signal of the plurality of drive signals at a drive node of a half-bridge circuit.

18. The method of claim 17, further comprising:

inverting the first drive signal by 180 degrees to generate the second drive signal.

19. The method of claim 17, further comprising:

compensating for a difference in slopes of the first drive signal and the second drive signal using a drive node to ground coupling compensation capacitor.

20. The method of claim 17, further comprising:

compensating for a charge injection into a shield node of the sensor by the drive node of the sensor using a shield coupling compensation capacitor of the circuit.

21. The method of claim 14, wherein the sensor is a microelectromechanical (MEMS) sensor.

22. The method of claim 14, wherein the half-bridge circuit is implemented in CMOS.