Backup mechanism of writing sequential data to single-level cell buffer and multi-level cell buffer

• US 10,592,410 B2
• Filed: 07/19/2018
• Issued: 03/17/2020
• Est. Priority Date: 09/28/2017
• Status: Active Grant

• Current Assignee: Silicon Motion, Inc. (Silicon Motion)
• Original Assignee: Silicon Motion, Inc. (Silicon Motion)
• Inventors: Lin, Wen-Sheng, Chen, Yu-Da
• Primary Examiner(s): Kim, Hong C
• Application Number:
  US16/039,740
• Publication Number:
  US 20190095321A1
• Time in Patent Office: 607 Days
• Field of Search: 711103, 711117, 711151, 711162
• CPC Class Codes: G06F 11/07 Responding to the occurrence of a fault, e.g. fault tolerance
• CPC Class Codes: G06F 11/1451 by selection of backup contents
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 2201/81 Threshold
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/068 Hybrid storage device
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/20 Initialising; Data preset; Chip identification
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 29/72 with optimized replacement algorithms
• CPC Class Codes: G11C 5/143 : Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels G11C5/148 takes precedence; Switching between alternative supplies G11C5/141 takes precedence
• CPC Class Codes: G11C 7/20 : Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory

Abstract

A data storage device includes a memory device and a controller. The memory device includes a first buffer, a second buffer, and a backup memory block. The first buffer is an MLC block and the second buffer is an SLC block. The controller is coupled to the memory device, receives a write command to write predetermined data in the memory device and determines whether the predetermined data has to be written into different buffers. When the controller determines that the predetermined data has to be written into different buffers, the controller writes a portion of the predetermined data that has been written in one or more predetermined pages of the first buffer into the backup memory block.

Claims

1. A data storage device, comprising:

a memory device, comprising a first buffer, a second buffer and a backup memory block, wherein the first buffer is a multi-level cell (MLC) block and the second buffer is a single-level cell (SLC) block; and

a controller, coupled to the memory device, and configured to receive a write command to write predetermined data in the memory device and determine whether the predetermined data has to be written into different buffers,

wherein when the controller determines that the predetermined data has to be written into different buffers, the controller is configured to write a portion of the predetermined data that has been written in one or more predetermined pages of the first buffer into the backup memory block,

wherein the predetermined data comprises a plurality of pages, the controller determines whether the predetermined data has to be written into different buffers based on size of the predetermined data and whether at least one page of the predetermined data has been stored in the second buffer, and when the size of the predetermined data is greater than a threshold value and at least one page of the predetermined data has been stored in the second buffer, the controller determines that the predetermined data has to be written into different buffers.

2. The data storage device as claimed in claim 1, wherein the controller generates a plurality of write queues according to the write command, the write queues comprise at least a first write queue, a second write queue and a third write queue, the first write queue indicates a first portion of data to be written into the first buffer, the second write queue indicates a second portion of data to be written into the second buffer, the third write queue indicates a third portion of data to be written into the first buffer, the controller executes the write command based on the first write queue, the second write queue and the third write queue, sequentially, and wherein before the controller performs a corresponding write task based on the third write queue, the controller is configured to write the data in the first portion of data that has been written in the one or more predetermined pages of the first buffer into the backup memory block.

3. The data storage device as claimed in claim 2, wherein the one or more predetermined pages are the strong pages of the first buffer.

4. A data storage device, comprising:

a memory device, comprising a first buffer, a second buffer and a backup memory block, wherein the first buffer is a multi-level cell (MLC) block and the second buffer is a single-level cell (SLC) block; and

a controller, coupled to the memory device, and configured to receive a write command to write predetermined data in the memory device and determine whether the predetermined data has to be written into the first buffer discontinuously,

wherein when the controller determines that the predetermined data has to be written into the first buffer discontinuously, the controller is configured to write a portion of the predetermined data that has been written in one or more predetermined pages of the first buffer into the backup memory block,

wherein the predetermined data comprises a plurality of pages, the controller determines whether the predetermined data has to be written into first buffer discontinuously based on size of the predetermined data and whether at least one page of the predetermined data has been stored in the second buffer, and when the size of the predetermined data is greater than a threshold value and at least one page of the predetermined data has been stored in the second buffer, the controller determines that the predetermined data has to be written into the first buffer discontinuously.

5. The data storage device as claimed in claim 4, wherein the controller generates a plurality of write queues according to the write command, the write queues comprise at least a first write queue, a second write queue and a third write queue, the first write queue indicates a first portion of data to be written into the first buffer, the second write queue indicates a second portion of data to be written into the second buffer, the third write queue indicates a third portion of data to be written into the first buffer, the controller executes the write command based on the first write queue, the second write queue and the third write queue, sequentially, and wherein before the controller performs a corresponding write task based on the third write queue, the controller is configured to write the data in the first portion of data that has been written in the one or more predetermined pages of the first buffer into the backup memory block.

6. The data storage device as claimed in claim 5, wherein the one or more predetermined pages are the strong pages of the first buffer.

7. A method for writing data into a memory device, suitable for a data storage device comprising a memory device and a controller, wherein the memory device comprises a first buffer, a second buffer and a backup memory block, the first buffer is a multi-level cell (MLC) block and the second buffer is a single-level cell (SLC) block, the method comprising:

performing a write operation based on a write command to write predetermined data in the memory device,

wherein the step of performing the write operation based on the write command further comprises;

during the write operation, writing a portion of the predetermined data that has been written in one or more predetermined pages of the first buffer into the backup memory block,

wherein the method further comprises;

determining whether the predetermined data has to be written into different buffers,

wherein when it is determined that the predetermined data has to be written into different buffers, writing the portion of the predetermined data that has been written in the one or more predetermined pages of the first buffer into the backup memory block,

wherein the predetermined data comprises a plurality of pages, and when size of the predetermined data is greater than a threshold value and at least one page of the predetermined data has been stored in the second buffer, it is determined that the predetermined data has to be written into different buffers.

8. The method as claimed in claim 7, further comprising:

determining whether the predetermined data has to be written into the first buffer discontinuously,

wherein when it is determined that the predetermined data has to be written into the first buffer discontinuously, writing the portion of the predetermined data that has been written in the one or more predetermined pages of the first buffer into the backup memory block.

9. The method as claimed in claim 8, wherein the predetermined data comprises a plurality of pages, and when the size of the predetermined data is greater than a threshold value and at least one page of the predetermined data has been stored in the second buffer, it is determined that the predetermined data has to be written into the first buffer discontinuously.

10. The method as claimed in claim 7, wherein the step of performing the write operation based on the write command further comprises:

generating a plurality of write queues according to the write command, wherein the write queues comprise at least a first write queue, a second write queue and a third write queue, the first write queue indicates a first portion of data to be written into the first buffer, the second write queue indicates a second portion of data to be written into the second buffer, the third write queue indicates a third portion of data to be written into the first buffer;

performing corresponding write tasks based on the first write queue and the second write queue;

after the write task corresponding to the second write queue has been finished, writing the data in the first portion of data that has been written in the one or more predetermined pages of the first buffer into the backup memory block; and

performing a corresponding write task based on the third write queue.

11. The method as claimed in claim 7, wherein the one or more predetermined pages are the strong pages of the first buffer.