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Molded die last chip combination

  • US 10,593,628 B2
  • Filed: 04/24/2018
  • Issued: 03/17/2020
  • Est. Priority Date: 04/24/2018
  • Status: Active Grant
First Claim
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1. A method of manufacturing a semiconductor chip device, comprising:

  • fabricating a redistribution layer (RDL) structure having multiple dielectric layers and a first external side and a second external side opposite to the first external side;

    mounting an interconnect chip on the first external side of the RDL structure; and

    mounting a first semiconductor chip and a second semiconductor chip on the second external side of the RDL structure after mounting the interconnect chip, the RDL structure and the interconnect chip electrically connecting the first semiconductor chip to the second semiconductor chip.

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