LED with internally confined current injection area

• US 10,593,832 B2
• Filed: 07/29/2016
• Issued: 03/17/2020
• Est. Priority Date: 12/27/2013
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: McGroddy, Kelly, Hu, Hsin-Hua, Bibl, Andreas, Chan, Clayton Ka Tsun, Haeger, Daniel Arthur
• Primary Examiner(s): Sun, Yu-Hsi D
• Application Number:
  US15/223,900
• Publication Number:
  US 20160336484A1
• Time in Patent Office: 1,327 Days
• CPC Class Codes: G09G 3/32 semiconductive, e.g. using light-emitting diodes [LED]
• CPC Class Codes: H01L 2224/75305 comprising protrusions
• CPC Class Codes: H01L 2224/75725 in the upper part of the bonding apparatus, e.g. in the bonding head
• CPC Class Codes: H01L 2224/7598 specially adapted for batch processes
• CPC Class Codes: H01L 2224/82203 Thermocompression bonding
• CPC Class Codes: H01L 24/75 Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 24/95 at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 27/016 Thin-film circuits
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/15153 the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 33/0016 having at least two p-n junctions
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/14 with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• CPC Class Codes: H01L 33/145 : with a current-blocking structure
• CPC Class Codes: H01L 33/16 : with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
• CPC Class Codes: H01L 33/20 : with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/30 : containing only elements of Group III and Group V of the Periodic Table
• CPC Class Codes: H01L 33/42 : Transparent materials

Abstract

Methods and structures for forming arrays of LED devices are disclosed. The LED devices in accordance with embodiments of the invention may include an internally confined current injection area to reduce non-radiative recombination due to edge effects. Several manners for confining current may include etch removal of a current distribution layer, etch removal of a current distribution layer and active layer followed by mesa re-growth, isolation by ion implant or diffusion, quantum well intermixing, and oxide isolation.

Claims

1. An LED device comprising:

a micro p-n diode including;

an active layer between a first doped layer and a second doped layer, wherein the first doped layer is doped with a first dopant type and the second doped layer is doped with a second dopant type opposite the first dopant type, and the active layer comprises a plurality of quantum well layers and a plurality of barrier layers; and

laterally opposite exterior sidewalls extending from a topmost surface of the micro p-n diode to a bottommost surface of the micro p-n diode;

wherein the micro p-n diode has a maximum dimension of 50 μ

m or less between the laterally opposite exterior sidewalls;

a current injection region located within the active layer; and

a modified confinement barrier region within the active layer and laterally surrounding the current injection region to confine current that flows through the active layer to an interior portion of the micro p-n diode and away from the sidewalls of the micro p-n diode, wherein the modified confinement barrier region comprises intermixed regions of the plurality of quantum well layers, the plurality of barrier layers, and an impurity concentration characterized by an impurity profile that extends through the second doped layer, the plurality of quantum well layers and the plurality of barrier layers;

wherein the intermixed regions of the plurality of quantum well layers are characterized by a higher average aluminum concentration than the current injection region within the plurality of quantum well layers, and intermixed regions of the plurality of barrier layers are characterized by a lower average aluminum concentration than the current injection region within the plurality of barrier layers.

2. The LED device of claim 1, wherein the intermixed regions are characterized by a larger bandgap than the quantum well layers within the current injection region.

3. The LED device of claim 1, further comprising a bottom conductive contact bonded to a bottom electrode of a subpixel within a display area of a display substrate.

4. The LED device of claim 3, wherein the bottom conductive contact is formed on the second doped layer.

5. The LED device of claim 4, wherein the bottom conductive contact comprises a metal stack.

6. The LED device of claim 5, wherein the metal stack comprises a gold layer diffused with a bonding layer on the bottom electrode.

7. The LED device of claim 1, wherein the current injection region has a maximum width of 10 μ

m or less.

8. The LED device of claim 1, wherein the profile of the impurity concentration is concentrated about the active layer.

9. The LED device of claim 1, wherein the impurity concentration comprises Zn or Mg.

10. The LED device of claim 1, wherein the impurity concentration comprises Si.

11. The LED device of claim 1, further comprising:

a first cladding layer between the first doped layer and the active layer; and

a second cladding layer between the second doped layer and the active layer;

wherein the profile of the impurity concentration extends through the second doped layer, the second cladding layer.

12. The LED device of claim 1, wherein the LED device is designed for red color emission.

13. The LED device of claim 12, wherein the first doped layer is n-type, and the second doped layer is p-type.

14. The LED device of claim 13, wherein the active layer comprises a material selected from the group consisting of AlGalnP, AlInP, AlGaP, AlGaAs, and InGaP.

15. The LED device of claim 1, wherein the first doped layer is a top layer and the second doped layer is a bottom layer underneath the first doped layer, wherein the second doped layer is facing a bottom electrode of a display substrate.

16. The LED device of claim 15, further comprising a bottom conductive contact on the second doped layer, wherein the bottom conductive contact is bonded to the bottom electrode of the display substrate.

17. The LED device of claim 16, wherein the bottom conductive contact comprises a metal stack.