Methods and systems for performing test and calibration of integrated sensors
First Claim
1. A computer system for performing test and calibration of one or more integrated sensors on a processor chip comprising a processor and a memory storing a tester program, the processor chip comprising:
- an on-chip service engine micro-controller; and
the one or more integrated sensors formed directly on the processor,wherein the processor chip is configured to perform;
initializing, by the tester program, an on-chip service engine of the processor chip for performing test and calibration of the one or more integrated sensors;
performing, by the on-chip service engine, test and calibration of the one or more integrated sensors; and
completing the test and calibration of the one or more integrated sensors,wherein the processor chip comprises the on-chip service engine, an on-chip service engine memory, and a plurality of the integrated sensors, the plurality of integrated sensors including at least one critical path monitor (CPM) sensor simulating a timing critical path that senses voltage droop of the processor chip, and wherein the processor chip performs testing and calibration of each integrated sensor among the plurality of sensors.
1 Assignment
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Accused Products
Abstract
Embodiments include methods, and computer system, and computer program products for performing test and calibration of integrated sensors on a processor chip. Aspects include: initializing, by a tester program, an on-chip service engine of processor chip, performing and completing, by on-chip service engine, test and calibration of integrated sensors. The method may also include: loading and decoding tester program into an on-chip service engine memory, testing and calibrating each integrated sensor, which may include: selecting an integrated sensor for test and calibration, loading sensor test and calibration patterns and parameters, and sensor test code, and executing the sensor test code to test and calibrate integrated sensors, writing results of the test and calibration to a predetermined location of the on-chip service engine memory, and writing a return code of test and calibration to another predetermined location of on-chip service engine memory, when every integrated sensor is tested and calibrated.
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Citations
12 Claims
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1. A computer system for performing test and calibration of one or more integrated sensors on a processor chip comprising a processor and a memory storing a tester program, the processor chip comprising:
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an on-chip service engine micro-controller; and the one or more integrated sensors formed directly on the processor, wherein the processor chip is configured to perform; initializing, by the tester program, an on-chip service engine of the processor chip for performing test and calibration of the one or more integrated sensors; performing, by the on-chip service engine, test and calibration of the one or more integrated sensors; and completing the test and calibration of the one or more integrated sensors, wherein the processor chip comprises the on-chip service engine, an on-chip service engine memory, and a plurality of the integrated sensors, the plurality of integrated sensors including at least one critical path monitor (CPM) sensor simulating a timing critical path that senses voltage droop of the processor chip, and wherein the processor chip performs testing and calibration of each integrated sensor among the plurality of sensors. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A computer program product operable on a computer system for performing test on a chip having partial-good portions, comprising a non-transitory computer storage medium readable by the computer system having a processor and a memory configured to store a tester program for execution by the processor of the computer system for performing a method comprising:
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initializing, by the tester program, an on-chip service engine formed on a processor chip for performing test and calibration of one or more integrated sensors on the processor chip; performing, by at least one intra-chip functional logic unit of the on-chip service engine formed on the processor chip, test and calibration of the one or more integrated sensors; and completing the test and calibration of the of the one or more integrated sensors, wherein the processor chip comprises the on-chip service engine, an on-chip service engine memory, and a plurality of the integrated sensors, the plurality of integrated sensors including at least one critical path monitor (CPM) sensor simulating a timing critical path that senses voltage droop of the processor chip, and wherein the processor chip performs testing and calibration of each integrated sensor among the plurality of sensors. - View Dependent Claims (8, 9, 10, 11, 12)
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Specification