Method of forming thin film and method of manufacturing integrated circuit device using the same

• US 10,600,643 B2
• Filed: 01/10/2018
• Issued: 03/24/2020
• Est. Priority Date: 05/25/2017
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Gyu-hee, Kim, Youn-soo, Kim, Hyun-jun, Lee, Jin-sun, Lim, Jae-soon
• Primary Examiner(s): Trinh, Michael M
• Application Number:
  US15/866,568
• Publication Number:
  US 20180342391A1
• Time in Patent Office: 804 Days
• CPC Class Codes: C23C 16/0272 Deposition of sub-layers, e.g. to promote the adhesion of the main coating
• CPC Class Codes: C23C 16/06 characterised by the deposition of metallic material
• CPC Class Codes: C23C 16/403 of aluminium, magnesium or beryllium
• CPC Class Codes: C23C 16/405 of refractory metals or yttrium
• CPC Class Codes: C23C 16/45529 specially adapted for making a layer stack of alternating different compositions or gradient compositions
• CPC Class Codes: C23C 16/45553 characterized by the use of precursors specially adapted for ALD
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02189 the material containing zirconium, e.g. ZrO2
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/02304 formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• CPC Class Codes: H01L 21/02312 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/02356 treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
• CPC Class Codes: H01L 29/40117 the electrodes comprising a charge-trapping insulator
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor
• CPC Class Codes: H10B 12/31 having a storage electrode stacked over the transistor
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels
• CPC Class Codes: H10B 43/35 with cell select transistors, e.g. NAND

Abstract

A method of forming a thin film and an integrated circuit device, including forming a first reaction inhibiting layer chemisorbed on a first portion of a lower film by supplying a reaction inhibiting compound having a carbonyl group to an exposed surface of the lower film at a temperature of about 300° C. to about 600° C.; forming a first precursor layer of a first material chemisorbed on a second portion of the lower film at a temperature of about 300° C. to about 600° C., the second portion being exposed through the first reaction inhibiting layer; and forming a first monolayer containing the first material on the lower film by supplying a reactive gas to the first reaction inhibiting layer and the first precursor layer and removing the first reaction inhibiting layer from the surface of the lower film, and thus exposing the first portion.

Claims

1. A method of forming a thin film, the method comprising:

forming a first reaction inhibiting layer chemisorbed on a first portion of a lower film by supplying a reaction inhibiting compound having a carbonyl group to an exposed surface of the lower film at a temperature of about 300°

C. to about 600°

C.;

forming a first precursor layer of a first material chemisorbed on a second portion of the lower film at a temperature of about 300°

C. to about 600°

C., the second portion being exposed through the first reaction inhibiting layer; and

forming a first monolayer containing the first material on the lower film by supplying a reactive gas to the first reaction inhibiting layer and the first precursor layer and removing the first reaction inhibiting layer from the surface of the lower film, and thus exposing the first portion.

2. The method as claimed in claim 1, wherein the reaction inhibiting compound includes a ketone functional group, a diketone functional group, a triketone functional group, a ketene functional group, an aldehyde functional group, an ester functional group, a carboxylic acid functional group, or an amide functional group.

3. The method as claimed in claim 1, wherein the reaction inhibiting compound is a β

-diketone compound.

4. The method as claimed in claim 1, wherein the reactive gas is an oxidizing gas or a nitriding gas.

5. The method as claimed in claim 1, wherein the reactive gas includes O₃.

6. The method as claimed in claim 1, wherein the first material is a metal or a semi-metal.

7. The method as claimed in claim 1, wherein the first material is aluminum (Al).

8. The method as claimed in claim 1, wherein:

the lower film includes a first metal oxide having a first dielectric constant, and

the first monolayer includes a second metal oxide having a second dielectric constant, the second dielectric constant being less than the first dielectric constant.

9. The method as claimed in claim 1, further comprising, after forming the first monolayer:

forming a second reaction inhibiting layer chemisorbed on the first monolayer and the first portion of the lower film by supplying the reaction inhibiting compound to the first monolayer and the first portion of the lower film;

forming a second precursor layer of the first material chemisorbed on some portions of the first monolayer exposed through the second reaction inhibiting layer; and

supplying the reactive gas to the second reaction inhibiting layer and the second precursor layer to form a second monolayer containing the first material by a reaction between the reactive gas and the second precursor layer while removing the second reaction inhibiting layer by a reaction between the reactive gas and the second reaction inhibiting layer.

10. The method as claimed in claim 9, wherein, in the forming of the second monolayer, at least some portions of the second monolayer are deposited on the lower film from the first monolayer in a lateral direction, which is parallel to an extension direction of a main surface of the lower film.

11. A method of manufacturing an integrated circuit device, the method comprising:

forming a lower structure on a substrate, and

forming an aluminum-containing film on the lower structure by performing the method as claimed in claim 1.

12. The method as claimed in claim 11, wherein:

forming the lower structure includes;

forming a lower electrode of a capacitor on the substrate, and

forming a zirconium oxide film, of which some portions are in an amorphous state, on the lower electrode at a first temperature of less than 300°

C., and

forming the film containing aluminum includes;

forming the first reaction inhibiting layer chemisorbed on a surface of the zirconium oxide film by supplying the reaction inhibiting compound to the surface of the zirconium oxide film at a second temperature of about 300°

C. to about 600°

C. to crystallize at least some portions of the zirconium oxide film,

forming a first aluminum precursor layer chemisorbed on the surface of the zirconium oxide film at a third temperature that is greater than the first temperature, the zirconium oxide film being exposed through the first reaction inhibiting layer, and

forming a first monolayer that includes aluminum oxide from the first aluminum precursor layer by supplying an oxidizing agent to the first reaction inhibiting layer and the first aluminum precursor layer at a fourth temperature that is greater than the first temperature, and simultaneously exposing some portions of the zirconium oxide film through the first monolayer by removing the first reaction inhibiting layer from the zirconium oxide film.

13. The method as claimed in claim 12, wherein the reaction inhibiting compound includes a ketone functional group, a diketone functional group, a triketone functional group, a ketene functional group, an aldehyde functional group, an ester functional group, a carboxylic acid functional group, or an amide functional group.

14. The method as claimed in claim 12, wherein the third temperature and the fourth temperature are each independently about 300°

C. to about 600°

C.