Micro-transfer-printable flip-chip structures and methods

• US 10,600,671 B2
• Filed: 07/03/2019
• Issued: 03/24/2020
• Est. Priority Date: 11/15/2016
• Status: Active Grant

• Current Assignee: X Display Company Technology Limited (Sensinnovat BVBA)
• Original Assignee: X-Celeprint Limited
• Inventors: Bower, Christopher, Meitl, Matthew, Trindade, Antonio Jose Marques, Cok, Ronald S., Raymond, Brook, Prevatte, Carl
• Primary Examiner(s): Diallo, Mamadou L
• Application Number:
  US16/502,350
• Publication Number:
  US 20190326149A1
• Time in Patent Office: 265 Days
• CPC Class Codes: B65G 47/91 incorporating pneumatic, e.g. suction, grippers
• CPC Class Codes: H01L 21/67144 Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68318 Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
• CPC Class Codes: H01L 2221/6835 used as a support during build up manufacturing of active devices
• CPC Class Codes: H01L 2221/68354 used to support diced chips prior to mounting
• CPC Class Codes: H01L 2221/68363 used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2221/68381 Details of chemical or physical process used for separating the auxiliary support from a device or wafer
• CPC Class Codes: H01L 2224/95 at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 2224/95001 involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
• CPC Class Codes: H01L 2224/95136 involving guiding structures, e.g. shape matching, spacers or supporting members
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 2933/0066 relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

In certain embodiments, a method of making a semiconductor structure suitable for transfer printing (e.g., micro-transfer printing) includes providing a support substrate and disposing and processing one or more semiconductor layers on the support substrate to make a completed semiconductor device. A patterned release layer and, optionally, a capping layer are disposed on or over the completed semiconductor device and the patterned release layer or capping layer, if present, are bonded to a handle substrate with a bonding layer. The support substrate is removed to expose the completed semiconductor device and, in some embodiments, a portion of the patterned release layer. In some embodiments, an entry path is formed to expose a portion of the patterned release layer. In some embodiments, the release layer is etched and the completed semiconductor devices transfer printed (e.g., micro-transfer printed) from the handle substrate to a destination substrate.

Claims

1. A semiconductor structure, comprising:

a destination substrate comprising two or more contact pads disposed on a surface of the destination substrate;

a completed semiconductor device disposed on the surface, the completed semiconductor device comprising two or more electrical contacts disposed on a common side of the completed semiconductor device; and

connection posts, each of the connection posts (i) extending from the completed semiconductor device, (ii) electrically connected to at least one of the two or more electrical contacts, and (iii) in electrical contact with one of the contact pads,

wherein the completed semiconductor device is tilted or angled with respect to the surface of the destination substrate.

2. The semiconductor structure of claim 1, wherein the connection posts do not all project a common distance from the completed semiconductor device.

3. The semiconductor structure of claim 1, wherein the electrical contacts are in different planes with respect to the completed semiconductor device and the connection posts have a common height.

4. The semiconductor structure of claim 1, wherein the completed semiconductor device comprises a substantially planar side opposite the common side.

5. The semiconductor structure of claim 4, wherein the substantially planar side is not parallel to the surface of the destination substrate.

6. The semiconductor structure of claim 1, wherein the completed semiconductor device comprises a broken or separated tether.

7. The semiconductor structure of claim 1, wherein the connection posts (i) have a sharp point, (ii) are tapered, (iii) have a height-to-width aspect ratio of greater than 1:

1, or (iv) any combination of (i)-(iii).

8. The semiconductor structure of claim 1, wherein the completed semiconductor device is a light-emitting device.

9. The semiconductor structure of claim 8, wherein the completed semiconductor device is a light-emitting diode or a laser.

10. The semiconductor structure of claim 8, wherein the completed semiconductor device is a diode laser.

11. The semiconductor structure of claim 1, wherein the completed semiconductor device is a photo-diode, a solar cell, a photo-transistor, a transistor, a sensor, or an integrated circuit.

12. The semiconductor structure of claim 1, wherein the completed semiconductor device has at least one of a width from 2 to 5 μ

m, 5 to 10 μ

m, 10 to 20 μ

m, or 20 to 50 μ

m, a length from 2 to 5 μ

m, 5 to 10 μ

m, 10 to 20 μ

m, or 20 to 50 μ

m, and a height from 2 to 5 μ

m, 4 to 10 μ

m, 10 to 20 μ

m, or 20 to 50 μ

m.

13. The semiconductor structure of claim 1, comprising a plurality of completed semiconductor devices disposed on the surface, each of the completed semiconductor devices comprising two or more electrical contacts disposed on a common side of the completed semiconductor device, and a connection post extending from each of the electrical contacts, connection post in electrical contact with one of the contact pads.

14. The semiconductor structure of claim 1, wherein the completed semiconductor device comprises a broken or separated tether and a surface of the broken or separated tether is disposed in a common plane with a surface of the completed semiconductor device.

15. The semiconductor structure of claim 1, wherein at least one of the connection posts extends from an electrical contact of the electrical contacts.

16. The semiconductor structure of claim 1, wherein the completed semiconductor comprises an electrically separate electrode electrically connected to each of the electrical contacts.

17. The semiconductor structure of claim 16, wherein at least one of the connection posts extends from the electrode.

18. The semiconductor structure of claim 1, wherein the completed semiconductor device is a printed completed semiconductor device.