Systems and methods for low latency access of memory between computing devices

• US 10,606,773 B2
• Filed: 01/04/2017
• Issued: 03/31/2020
• Est. Priority Date: 01/04/2017
• Status: Active Grant

• Current Assignee: Lenovo Global Technologies International Ltd. (Lenovo Group Ltd.)
• Original Assignee: Lenovo Enterprise Solutions (Singapore) Pte., Ltd. (Lenovo Group Ltd.)
• Inventors: Condict, Michael Neil, Hinkle, Jonathan Randall
• Primary Examiner(s): Callahan, Paul E
• Application Number:
  US15/397,960
• Publication Number:
  US 20180189199A1
• Time in Patent Office: 1,182 Days
• CPC Class Codes: G06F 13/161 with latency improvement
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G06F 21/44 Program or device authentication
• CPC Class Codes: G06F 2213/0026 PCI express
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0622 in relation to access
• CPC Class Codes: G06F 3/0637 Permissions
• CPC Class Codes: G06F 3/0644 Management of space entities, e.g. partitions, extents, pools
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: H04L 63/083 using passwords cryptographic mechanisms or cryptographic arrangements for entity authentication using a predetermined code H04L9/3226

Abstract

Disclosed are methods and systems for low latency modification of memory on a remote computer system. According to one aspect of the present disclosure, a method includes, at a first computing device, receiving from a second computing device, a memory access request including a security key and a unique identifier generated by the first computing device. The method further includes verifying, based on the security key and the unique identifier, that the first computing device is authorized to access a predetermined portion of memory. Also, in response to verifying that the first computing device is authorized to access the predetermined portion of memory, accessing, by the second computing device, the predetermined portion of memory.

Claims

1. A method comprising:

at a first computing device;

receiving, from a second computing device, a memory access request including a starting offset within a specified range of memory, a predetermined size of data, a predetermined portion of memory, security key, and unique identifier generated by the first computing device;

determining a difference between the offset and the predetermined size of data;

determining that the specified range of memory is within a predetermined portion of memory based on whether the difference exceeds the predetermined portion of memory;

verifying, based on the security key and the unique identifier, that the second computing device is authorized to access the specified range of memory;

in response to verifying that the second computing device is authorized to access the specified range of memory,

accessing, by the first computing device, the specified range of memory on behalf of the second computing device;

in response to determining that the difference does not exceed the predetermined portion of memory, executing a command on the predetermined portion of memory to modify the specified range of memory at the received starting offset within the specified range of memory.

2. The method of claim 1, wherein the command comprises a write command that is executable by the first computing device for one of modifying, saving, and transferring data to the specified range of memory.

3. The method of claim 1, wherein the memory comprises non-volatile random access memory (NVRAM).

4. The method of claim 1, wherein the method further comprises:

determining whether the security key and unique identifier corresponds to the specified range of memory; and

in response to determining that the security key and unique identifier does not correspond to the specified range of memory, returning a failure indicator.

5. The method of claim 1, wherein the specified range of memory corresponds to a plurality of different defined portions of the memory, and

wherein the method further comprises transferring a failure indicator back to the second computing device.

6. The method of claim 1, wherein the command comprises a command for writing data of a predetermined size to the specified range of memory from the first computing device to the second computing device, and

wherein the method further comprises:

determining whether the predetermined size of data exceeds a predetermined amount of data; and

in response to determining that the predetermined size exceeds the predetermined amount of data, transmitting the predetermined amount of data from the first computing device to the second computing device by buffering the data in separate portions.

7. The method of claim 1, further comprising generating the security key and the unique identifier for the second computing device;

associating the security key and the unique identifier with the specified range of memory; and

communicating the security key and the unique identifier to the second computing device for use in accessing the specified range of memory.

8. A computing device comprising:

a memory including a specified range; and

a remote memory controller that;

receives, from another computing device, a memory access request including a starting offset within a specified range of memory, a predetermined size of data, a predetermined portion of memory, security key, and unique identifier generated by the remote memory controller;

determine a difference between the offset and the predetermined size of data;

determine that the specified range of memory is within a predetermined portion of memory based on whether the difference exceeds the predetermined portion of memory;

verify, based on the security key and the unique identifier, that the another computing device is authorized to access the specified range of memory;

access, on behalf of the another computing device, the specified range of memory in response to verifying that the another computing device is authorized to access the specified range of memory; and

in response to determining that the difference does not exceed the predetermined portion of memory, executing a command on the predetermined portion of memory to modify the specified range of memory at the received starting offset within the specified range of memory.

9. The computing device of claim 8, wherein the remote memory controller includes a first port and a second port, wherein the first port establishes connection to the memory and a device driver and the second port establishes connection to the second computing device.

10. The computing device of claim 8, wherein the command comprises a write command that is executable by the computing device for one of modifying, saving, and transferring data to the specified range of memory.

11. The computing device of claim 8, wherein the memory comprises non-volatile random access memory (NVRAM).

12. The computing device of claim 8, wherein the remote memory controller further:

determines whether the security key and unique identifier corresponds to the specified range of memory; and

in response to determining that the security key and unique identifier does not correspond to the specified range of memory, returns a failure indicator.

13. The computing device of claim 8, wherein the specified range of memory corresponds to a plurality of different defined portions of the memory, and

wherein the remote memory controller further transmits a failure indicator back to the another computing device.

14. The computing device of claim 8, wherein the command comprises a command for writing data of a predetermined size to the specified range of memory from the another computing device to the computing device via the PCIe interconnect, and

wherein the remote memory controller:

determines whether the predetermined size of data exceeds a predetermined amount of data; and

in response to determining that the predetermined size exceeds the predetermined amount of data, transmits the predetermined amount of data from the first computing device to the another computing device by buffering the data in separate portions.

15. The computing device of claim 8, wherein the remote memory controller:

generates the security key and unique identifier for the another computing device;

associates the security key and unique identifier with the specified range of memory; and

communicates the security key and unique identifier to the another computing device for use in accessing the predetermined portion of memory.

16. A computing device comprising:

a communications device comprising at least one processor that communicates via a peripheral component interconnect express (PCIe) interconnect; and

a memory manager comprising at least one processor and memory that;

receives, from another computing device, a starting offset within a specified range of memory, a predetermined size of data, a predetermined portion of memory, security key and unique identifier for accessing the specified range of memory associated with the another computing device;

determines a difference between the offset and the predetermined size of data;

determines that the specified range of memory is within a predetermined portion of memory based on whether the difference exceeds the predetermined portion of memory;

communicates, to the another computing device, a memory access request including the security key and unique identifier via the PCIe interconnect;

accesses the specified range of memory upon receipt of permission from the another computing device;

executes a command to modify the specified range of memory at the received starting offset within the specified range of memory.

17. The computing device of claim 16, wherein the memory manager communicates, to the another computing device, an instruction to execute a command for modifying the specified range of memory.

18. The computing device of claim 17, wherein the command comprises a write command that is executable by the another computing device for one of modifying, saving, and transferring data to the specified range of memory.