Spot-solderable leads for semiconductor device packages
First Claim
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1. A semiconductor device comprising:
- at least one semiconductor chip attached to a leadframe, the leadframe including leads of a first subset alternating with leads of an adjacent second subset, the subsets having elongated straight lead portions that are parallel to each other in a planar array;
a package of polymeric compound covering the leadframe, the planar array of the straight lead portions of the first and the second subsets are located at a surface of the package, and un-encapsulated surfaces of the leads are coplanar with the surface of the package; and
insulator-filled surface grooves located across the elongated straight lead portions of the leads of the first and second subsets, the insulator-filled surface grooves defining a solder-allowed area of the leads of the first and second subsets, the portions of the leads of the first and second subsets not containing insulator-filled surface grooves having an unencumbered full thickness.
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Abstract
A semiconductor device that has at least one semiconductor chip attached to a leadframe made of sheet metal of unencumbered full thickness. The leadframe has leads of a first subset that alternate with leads of a second subset. The leads of the first and second subsets have elongated straight lead portions that are parallel to each other in a planar array. A cover layer of insulating material is located over portions of un-encapsulated lead surfaces. The portions of the leads of the first and second subsets that don'"'"'t have the cover layer have a metallurgical configuration that creates an affinity for solder wetting.
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Citations
8 Claims
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1. A semiconductor device comprising:
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at least one semiconductor chip attached to a leadframe, the leadframe including leads of a first subset alternating with leads of an adjacent second subset, the subsets having elongated straight lead portions that are parallel to each other in a planar array; a package of polymeric compound covering the leadframe, the planar array of the straight lead portions of the first and the second subsets are located at a surface of the package, and un-encapsulated surfaces of the leads are coplanar with the surface of the package; and insulator-filled surface grooves located across the elongated straight lead portions of the leads of the first and second subsets, the insulator-filled surface grooves defining a solder-allowed area of the leads of the first and second subsets, the portions of the leads of the first and second subsets not containing insulator-filled surface grooves having an unencumbered full thickness. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification