Method of increased supply rejection on single-ended complementary metal-oxide-semiconductor (CMOS) switches
First Claim
1. A system, comprising:
- a voltage regulator to receive a supply voltage and generate a regulated voltage by regulating an amplitude of the received supply voltage; and
a complementary metal-oxide-semiconductor (CMOS) circuit including;
an input terminal to receive a first voltage;
switching circuitry to selectively couple the CMOS circuit to the voltage regulator in one of a plurality of configurations; and
an output terminal to output a second voltage based at least in part on the first voltage and the regulated voltage when the CMOS circuit is coupled to the voltage regulator in a first configuration of the plurality of configurations;
wherein the CMOS circuit further includes an N-type metal-oxide semiconductor (NMOS) transistor to generate the second voltage when the first voltage is below a threshold voltage level, the NMOS transistor comprising;
a drain coupled to the input terminal;
a source coupled to the output terminal; and
a gate switchably coupled to one of the voltage regulator or a ground potential via a first switch of the switching circuitry.
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Accused Products
Abstract
A complementary metal-oxide-semiconductor (CMOS) switching system with increased supply rejection is disclosed. The system comprises a voltage regulator and a CMOS circuit. The voltage regulator receives a supply voltage and generates a regulated voltage by regulating an amplitude of the received supply voltage. The CMOS circuit includes an input terminal to receive a first voltage, switching circuitry to selectively couple the CMOS circuit to the voltage regulator in one of a plurality of configurations, and an output terminal to output a second voltage based at least in part on the first voltage and the regulated voltage when the CMOS circuit is coupled to the voltage regulator in a first configuration of the plurality of configurations.
57 Citations
18 Claims
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1. A system, comprising:
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a voltage regulator to receive a supply voltage and generate a regulated voltage by regulating an amplitude of the received supply voltage; and a complementary metal-oxide-semiconductor (CMOS) circuit including; an input terminal to receive a first voltage; switching circuitry to selectively couple the CMOS circuit to the voltage regulator in one of a plurality of configurations; and an output terminal to output a second voltage based at least in part on the first voltage and the regulated voltage when the CMOS circuit is coupled to the voltage regulator in a first configuration of the plurality of configurations; wherein the CMOS circuit further includes an N-type metal-oxide semiconductor (NMOS) transistor to generate the second voltage when the first voltage is below a threshold voltage level, the NMOS transistor comprising; a drain coupled to the input terminal; a source coupled to the output terminal; and a gate switchably coupled to one of the voltage regulator or a ground potential via a first switch of the switching circuitry. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A system, comprising:
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a voltage regulator to receive a supply voltage and generate a regulated voltage by regulating an amplitude of the received supply voltage; a complementary metal-oxide-semiconductor (CMOS) circuit including; an NMOS transistor having a drain coupled to an input terminal of the CMOS circuit, a source coupled to an output terminal of the CMOS circuit, and a gate switchably coupled to the voltage regulator; a PMOS transistor having a drain coupled to the output terminal of the CMOS circuit, a source coupled to the input terminal of the CMOS circuit, and a gate switchably coupled to the voltage regulator; and switching circuitry to selectively couple the gate of the NMOS transistor or the gate of the PMOS transistor to the voltage regulator. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A method, comprising:
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receiving a supply voltage; generating a regulated voltage by regulating an amplitude of the received supply voltage; and selectively providing the regulated voltage to a complementary metal-oxide-semiconductor (CMOS) circuit in one of a plurality of configurations to cause the CMOS circuit to; receive a first voltage; and output a second voltage based at least in part on the first voltage and the regulated voltage when the regulated voltage is provided to the CMOS circuit in a first configuration of the plurality of configurations; wherein the CMOS circuit includes an N-type metal-oxide semiconductor (NMOS) transistor to generate the second voltage when the first voltage is below a threshold voltage level, the NMOS transistor comprising; a drain to receive the first voltage; a source to output the second voltage; and a gate to selectively receive the regulated voltage. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification