Adaptive assignment of open logical erase blocks to data streams

• US 10,613,784 B2
• Filed: 10/19/2017
• Issued: 04/07/2020
• Est. Priority Date: 09/25/2015
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Ioannou, Nikolas, Pletka, Roman A., Tomic, Sasa
• Primary Examiner(s): Gossage, Glenn
• Application Number:
  US15/788,577
• Publication Number:
  US 20180046376A1
• Time in Patent Office: 901 Days
• Field of Search: None
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0643 Management of files
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A computer-implemented method is provided, which includes: assigning data having a first heat to a first data stream, assigning data having a second heat to a second data stream, determining an anticipated throughput of each of the first and second data streams, assigning a first number of logical erase blocks of non-volatile memory to the first data stream based on the anticipated throughput of the first data stream, and assigning a second number of logical erase blocks of non-volatile memory to the second data stream based on the anticipated throughput of the second data stream. Wear-leveling may be performed on open logical erase blocks, including assigning at least some open of the logical erase blocks to a queue. Open logical erase blocks having health values less than a health value of other logical erase blocks by a predetermined amount may be skipped over during the assigning of open logical erase blocks to the queue. The number of logical erase blocks assigned to the data streams may be statically assigned, or may be adjusted dynamically based on at least one of temporal stream throughput and stream stall events.

Claims

1. A computer-implemented method, comprising:

assigning data having a first heat to a first data stream;

assigning data having a second heat to a second data stream;

determining an anticipated throughput of each of the first and second data streams;

assigning a first number of logical erase blocks of non-volatile memory to the first data stream based on the anticipated throughput of the first data stream;

assigning a second number of logical erase blocks of non-volatile memory to the second data stream based on the anticipated throughput of the second data stream; and

performing wear leveling on open logical erase blocks, wherein performing the wear leveling includes;

assigning at least some of the open logical erase blocks to a queue,

wherein open logical erase blocks having health values less than a health value of other logical erase blocks by a predetermined amount are skipped over during the assigning of open logical erase blocks to the queue, wherein the first and second numbers of logical erase blocks are assigned to the first and second data streams, respectively, from the queue.

2. The computer-implemented method of claim 1, wherein the first and second numbers of logical erase blocks assigned to the first and second data streams are proportional to the anticipated throughput of the first and second data streams, respectively.

3. The computer-implemented method of claim 1, wherein the first and/or second number of logical erase blocks are statically assigned to each of the first and/or second data streams such that the number of logical erase blocks assigned to the first and/or second data streams remain fixed regardless of fluctuations in throughput of the first and/or second data streams during operation.

4. The computer-implemented method of claim 1, wherein the first and/or second number of logical erase blocks assigned to the first and/or second data streams are adjusted dynamically based on a measurement of stream stall events of the first and/or second data streams.

5. The computer-implemented method of claim 3, wherein the non-volatile memory includes NAND Flash memory, and wherein the first and/or second number of logical erase blocks are statically assigned to each of the first and/or second data streams in response to receiving a first one of the first data stream and the second data stream.

6. The computer-implemented method of claim 1, wherein the logical erase blocks are assigned to the data streams in a round-robin fashion across all planes of the non-volatile memory.

7. The computer-implemented method of claim 1, comprising:

performing the wear leveling on open logical erase blocks prior to assigning the first and second numbers of logical erase blocks,

wherein performing the wear leveling includes;

determining a health value of each of the open logical erase blocks; and

comparing the determined health values.

8. The computer-implemented method of claim 7, wherein the logical erase blocks are assigned to the data streams in a first-come-first-served fashion.

9. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a controller to cause the controller to:

assign, by the controller, data having a first heat to a first data stream;

assign, by the controller, data having a second heat to a second data stream;

determine, by the controller, an anticipated throughput of each of the first and second data streams;

assign, by the controller, a first number of logical erase blocks of non-volatile memory to the first data stream based on the anticipated throughput of the first data stream;

assign, by the controller, a second number of logical erase blocks of non-volatile memory to the second data stream based on the anticipated throughput of the second data stream; and

perform, by the controller, wear leveling on open logical erase blocks, wherein performing the wear leveling includes;

assigning at least some of the open logical erase blocks to a queue;

wherein open logical erase blocks having health values less than a health value of other logical erase blocks by a predetermined amount are skipped over during the assigning of open logical erase blocks to the queue, wherein the first and second numbers of logical erase blocks are assigned to the first and second data streams, respectively, from the queue.

10. The computer program product of claim 9, wherein the first and second numbers of logical erase blocks assigned to the first and second data streams are proportional to the anticipated throughput of the first and second data streams, respectively.

11. The computer program product of claim 9, wherein the first and/or second number of logical erase blocks are statically assigned to each of the first and/or second data streams such that the number of logical erase blocks assigned to the first and/or second data streams remain fixed regardless of fluctuations in throughput of the first and/or second data streams during operation.

12. The computer program product of claim 9, wherein the non-volatile memory includes NAND Flash memory, and wherein the first and/or second number of logical erase blocks assigned to the first and/or second data streams are adjusted dynamically based on a measurement of stream stall events of the first and/or second data streams.

13. The computer program product of claim 9, wherein the logical erase blocks are assigned to the data streams in a first-come-first-served fashion, wherein determining the anticipated throughput of each of the first and second data streams includes estimating the anticipated throughput based on expected target workloads.

14. The computer program product of claim 9, wherein the logical erase blocks are assigned to the data streams in a round-robin fashion across all planes of the non-volatile memory.

15. The computer program product of claim 9, the program instructions readable and/or executable by the controller to cause the controller to:

perform, by the controller, the wear leveling on open logical erase blocks prior to assigning the first and second numbers of logical erase blocks,

wherein performing the wear leveling includes;

determining a health value of each of the open logical erase blocks; and

comparing the health value of each of the open logical erase blocks to each other.

16. A system, comprising:

a plurality of non-volatile random access memory blocks configured to store data; and

a processor and logic integrated with and/or executable by the processor, the logic being configured to;

assign data having a first heat to a first data stream;

assign data having a second heat to a second data stream;

determine an anticipated throughput of each of the first and second data streams;

assign a first number of logical erase blocks of non-volatile memory to the first data stream based on the anticipated throughput of the first data stream;

assign a second number of logical erase blocks of non-volatile memory to the second data stream based on the anticipated throughput of the second data stream; and

perform wear leveling on open logical erase blocks, wherein performing the wear leveling includes;

assigning at least some of the open logical erase blocks to a queue;

wherein the first and/or second number of logical erase blocks are statically assigned to each of the first and/or second data streams in response to receiving a first one of the data having the first heat and the data having the second heat,

wherein open logical erase blocks having health values less than a health value of other logical erase blocks by a predetermined amount are skipped over during the assigning of open logical erase blocks to the queue, wherein the first and second numbers of logical erase blocks are assigned to the first and second data streams, respectively, from the queue.

17. The system of claim 16, wherein the first and second numbers of logical erase blocks assigned to the first and second data streams are proportional to the anticipated throughput of the first and second data streams, respectively.

18. The system of claim 16, wherein the logic is configured to:

perform the wear leveling on all open logical erase blocks prior to assigning the first and second numbers of logical erase blocks,

wherein performing the wear leveling includes;

determining a health value of each of the open logical erase blocks; and

comparing the health value of each of the open logical erase blocks to the health values of the other logical erase blocks.

19. The system of claim 18, wherein the open logical erase blocks are statically assigned to the queue in a round-robin fashion across all planes of the non-volatile memory, wherein comparing the health value of each of the open logical erase blocks includes comparing the health value of each of the open logical erase blocks to an average health value of the other logical erase blocks and/or a minimum health value of the other logical erase blocks.