Noise modulation for on-chip noise measurement

• US 10,620,253 B2
• Filed: 10/30/2017
• Issued: 04/14/2020
• Est. Priority Date: 03/28/2014
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Hejase, Jose A., Na, Nanju, Pham, Nam H., Walls, Lloyd A.
• Primary Examiner(s): Astacio-Oquendo, Giovanni
• Application Number:
  US15/797,440
• Publication Number:
  US 20180045766A1
• Time in Patent Office: 897 Days
• Field of Search: 324613, 324 7639, 3247503
• CPC Class Codes: G01R 29/26 Measuring noise figure; Measuring signal-to-noise ratio
• CPC Class Codes: G01R 31/001 Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing measuring electromagnetic fields G01R29/08; circuits for generating HV pulses in dielectric strength testing G01R31/14
• CPC Class Codes: G01R 31/3187 Built-in tests

Abstract

Functionality for estimating characteristics of an on-chip noise signal can be implemented on a processing module. An on-chip noise signal is determined at an on-chip determination point of a computer chip. The on-chip noise signal is converted to a frequency-varying signal using a voltage-controlled oscillator implemented on the computer chip. The frequency-varying signal is measured at an off-chip measurement point and frequency information is extracted from the frequency-varying signal. The frequency information is converted to a voltage level associated with the on-chip noise signal based on the relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator.

Claims

1. A method comprising:

receiving, by an off-chip noise estimation unit external to a computer chip, a frequency-varying signal produced by the computer chip, the frequency-varying signal representative of an on-chip noise signal determined at an on-chip determination point of the computer chip, wherein the off-chip noise estimation unit comprises at least one member of the group consisting of an integrated circuit and a processor with associated memory;

determining, by the off-chip noise estimation unit, a subset of the frequency-varying signal;

executing, by the off-chip noise estimation unit, time-to-frequency domain conversion operations to convert the subset of the frequency-varying signal to a corresponding frequency domain signal; and

determining, by the off-chip noise estimation unit, a voltage level associated with the on-chip noise signal based, at least in part, on frequency information extracted from the frequency domain signal and a relationship between an input voltage provided to a voltage-controlled oscillator associated with the computer chip and an output frequency generated by the voltage-controlled oscillator.

2. The method of claim 1, wherein an instantaneous frequency of the frequency-varying signal varies according to an instantaneous voltage level of the on-chip noise signal.

3. The method of claim 1, wherein said determining the voltage level associated with the on-chip noise signal comprises:

determining that an amplitude of the frequency domain signal exceeds a predefined threshold at a first frequency of the frequency domain signal;

designating the first frequency as a resonant frequency of the frequency domain signal, wherein the frequency information includes the resonant frequency; and

converting the resonant frequency to the voltage level associated with the on-chip noise signal based, at least in part, on the relationship between the input voltage provided to the voltage-controlled oscillator and the output frequency generated by the voltage-controlled oscillator.

4. The method of claim 1, further comprising:

determining a variation in the voltage level with time based, at least in part, on the frequency information and a time interval that corresponds to the subset of the frequency-varying signal.

5. The method of claim 1, wherein said determining, by the off-chip noise estimation unit, the subset of the frequency-varying signal comprises executing windowing operations on the frequency-varying signal to yield the subset of the frequency-varying signal.

6. The method of claim 5, wherein a first window produced by the windowing operations overlaps a second window produced by the windowing operations.

7. The method of claim 1, further comprising:

determining whether to execute noise cancellation operations at the computer chip based on at least one of the voltage level associated with the on-chip noise signal and an application executing on the computer chip.

8. A device for estimating voltage on a computer chip, the device comprising:

an interface to communicably couple the device to an off-chip measurement point for the computer chip; and

a noise estimation unit comprising at least one member of the group consisting of an integrated circuit and a processor with associated memory that is external to the computer chip, the noise estimation unit configured to;

receive via the interface a frequency-varying signal produced by the computer chip, the frequency-varying signal representative of an on-chip noise signal;

determine a subset of the frequency-varying signal;

execute time-to-frequency domain conversion operations to convert the subset of the frequency-varying signal to a corresponding frequency domain signal; and

determine a voltage level associated with the on-chip noise signal based, at least in part, on frequency information extracted from the frequency domain signal and a relationship between an input voltage provided to a voltage-controlled oscillator associated with the computer chip and an output frequency generated by the voltage-controlled oscillator.

9. The device of claim 8, wherein the noise estimation unit is further configured to execute windowing operations on the frequency-varying signal to yield the subset of the frequency-varying signal.

10. The device of claim 8, wherein the noise estimation unit is further configured to:

determine that an amplitude of the frequency domain signal exceeds a predefined threshold at a first frequency of the frequency domain signal;

identify the first frequency as a resonant frequency of the frequency domain signal, wherein the frequency information includes the resonant frequency; and

convert the resonant frequency to the voltage level associated with the on-chip noise signal based, at least in part, on the relationship between the input voltage provided to the voltage-controlled oscillator and the output frequency generated by the voltage-controlled oscillator.

11. The device of claim 8, wherein the noise estimation unit is further configured to:

determine a variation in the voltage level with time based, at least in part, on the frequency information, and a time interval that corresponds to the subset of the frequency-varying signal.

12. The device of claim 8, wherein the integrated circuit comprises a system on a chip.

13. The device of claim 11, wherein the integrated circuit comprises an application specific integrated circuit.

14. A system comprising:

a computer chip comprising a voltage-controlled oscillator configured to;

convert an on-chip noise signal determined at a determination point on the computer chip to a frequency-varying signal; and

provide the frequency-varying signal to an off-chip measurement point for the computer chip;

an off-chip noise estimation unit that is external to the computer chip, the off-chip noise estimation unit comprising at least one member of the group consisting of an integrated circuit and a processor with associated memory, the off-chip noise estimation unit configured to;

receive the frequency-varying signal via the the off-chip measurement point;

determine a subset of the frequency-varying signal;

execute time-to-frequency domain conversion operations to convert the subset of the frequency-varying signal to a corresponding frequency domain signal; and

determine a voltage level associated with the on-chip noise signal based, at least in part, on frequency information extracted from the frequency domain signal and a relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator.

15. The system of claim 14, wherein the off-chip noise estimation unit is further configured to execute windowing operations on the frequency-varying signal to yield the subset of the frequency-varying signal.

16. The system of claim 14, wherein the off-chip noise estimation unit is further configured to:

determine a variation in the voltage level with time based, at least in part, on the frequency information and a time interval that corresponds to the subset of the frequency-varying signal.

17. The system of claim 16, wherein the off-chip noise estimation unit is further configured to:

determine a reference output frequency of an output signal generated by the voltage-controlled oscillator for each of a plurality of reference direct current (DC) signals provided to the voltage-controlled oscillator; and

determine a voltage-to-frequency conversion structure based, at least in part, on the plurality of reference DC signals and the corresponding reference output frequency, wherein the off-chip noise estimation unit is configured to determine the voltage level associated with the on-chip noise signal using the voltage-to-frequency conversion structure.

18. The system of claim 16, wherein the computer chip further comprises a noise determination unit configured to:

determine the on-chip noise signal at the determination point on the computer chip; and

provide the on-chip noise signal to the off-chip measurement point.

19. The system of claim 14, wherein the integrated circuit comprises a system on a chip.

20. The system of claim 16, wherein the integrated circuit comprises an application specific integrated circuit.