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System and method of managing signals in information handling systems

  • US 10,621,135 B2
  • Filed: 04/26/2018
  • Issued: 04/14/2020
  • Est. Priority Date: 04/26/2018
  • Status: Active Grant
First Claim
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1. An information handling system, comprising:

  • a processor;

    a memory medium that stores information handling system firmware, executable by the processor, and that is coupled to the at least one processor;

    a plurality of dies, each of the plurality of dies includes at least one processing core and at least one Peripheral Component Interconnect Express (PCIe) root complex;

    a plurality of PCIe risers, each of the plurality of PCIe risers including a plurality of PCIe slots; and

    circuitry that is coupled to the plurality of dies and coupled to the plurality of PCIe risers;

    wherein the circuitry is configured to;

    receive a first signal from the information handling system firmware executed by the processor;

    provide, based at least on the first signal, each of a first plurality of reset assertion signals to each of the plurality of PCIe risers, respectively;

    receive a second plurality of reset assertion signals from the plurality of dies, respectively;

    receive a second signal from the information handling system firmware executed by the processor;

    determine that the circuitry received the second plurality of reset assertion signals and the second signal; and

    after determining that the circuitry received the second plurality of signals and the second signal, provide each of a third plurality of reset de-assertion signals to a respective PCIe riser of the plurality of PCIe risers.

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