High-voltage GaN high electron mobility transistors with reduced leakage current

• US 10,622,467 B2
• Filed: 11/26/2018
• Issued: 04/14/2020
• Est. Priority Date: 04/15/2016
• Status: Active Grant

• Current Assignee: MACOM Technology Solutions Holdings, Inc.
• Original Assignee: MACOM Technology Solutions Holdings, Inc.
• Inventors: Boles, Timothy E., Carlson, Douglas, Kaleta, Anthony
• Primary Examiner(s): Mandala, Victor A
• Application Number:
  US16/199,408
• Publication Number:
  US 20190341480A1
• Time in Patent Office: 505 Days
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/401 Multistep manufacturing processes
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/41758 for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular H01L29/41733 - H01L29/4175 take precedence
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42312 Gate electrodes for field effect devices
• CPC Class Codes: H01L 29/42316 for field-effect transistors
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/475 on AIII-BV compounds
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
• CPC Class Codes: H01L 29/7786 with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
• CPC Class Codes: H01L 29/7787 with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

Abstract

High-voltage, gallium-nitride HEMTs are described that are capable of withstanding reverse-bias voltages of at least 900 V and, in some cases, in excess of 2000 V with low reverse-bias leakage current. A HEMT may comprise a lateral geometry having a gate, a thin insulating layer formed beneath the gate, a gate-connected field plate, and a source-connected field plate.

Claims

1. A high electron-mobility transistor (HEMT) comprising:

a gallium-nitride conduction layer;

a barrier layer formed over the gallium-nitride conduction layer;

a gate, source, and drain formed over the barrier layer;

a first insulating layer formed in regions between the gate and drain and between the gate and source;

a gallium-oxide layer formed between the barrier layer and the gate; and

a gate-connected field plate electrically connected to the gate and extending beyond edges of the gate toward the drain and source over the first insulating layer.

2. The HEMT of claim 1, wherein the gallium-oxide layer has a thickness between approximately 1 nm and approximately 5 nm.

3. The HEMT of claim 2, further comprising a gallium-nitride cap layer formed between the barrier layer and the gallium-oxide layer.

4. The HEMT of claim 3, wherein a thickness of the gallium-nitride cap layer is between approximately 1 nm and approximately 10 nm.

5. The HEMT of claim 3, further comprising:

a source-connected field plate comprising a conductor that is electrically connected to the source and extends over the gate; and

a second insulating layer separating the source-connected field plate and the gate.

6. The HEMT of claim 5, wherein the source-connected field plate extends beyond the gate-connected field plate toward the drain a distance between approximately 1 micron and approximately 4 microns.

7. The HEMT of claim 6, wherein an edge of the source-connected field plate is between approximately 4 microns and approximately 10 microns from an edge of the drain.

8. The HEMT of claim 5, wherein a thickness of the first insulating layer is between approximately 25 nm and approximately 200 nm.

9. The HEMT of claim 5, wherein a thickness of the second insulating layer is between approximately 300 nm and approximately 600 nm.

10. The HEMT of claim 5 configured to withstand a reverse-bias voltage of approximately 2000 volts.

11. The HEMT of claim 10, wherein a reverse-leakage current at 2000 volts reverse bias is not more than 40 microamps per millimeter of gate width.

12. The HEMT of claim 10 configured to handle a forward current of 1 amp per millimeter of gate width.

13. The HEMT of claim 3, further comprising electrical isolation regions formed adjacent to the source and drain, wherein the electrical isolation regions comprise damaged crystalline semiconductor that includes one or more of the following implanted ion species:

nitrogen, phosphorous, boron, and argon.

14. The HEMT of claim 3, wherein a length of the gate is between approximately 0.1 micron and approximately 1.5 micron.

15. The HEMT of claim 3, wherein a spacing between an edge of the gate and an edge of the drain is between approximately 5 microns and approximately 20 microns.

16. The HEMT of claim 3, wherein the gate length is approximately 0.15 micron, and the HEMT is configured to drive currents up to 1 amp/mm at modulation rates as high as 30 GHz.

17. A high electron-mobility transistor (HEMT) comprising:

a gallium-nitride conduction layer;

a barrier layer formed over the gallium-nitride conduction layer;

a gate, source, and drain formed over the barrier layer;

a first insulating layer formed in regions between the gate and drain and between the gate and source;

a gate insulating layer having a thickness between approximately 1 nm and approximately 5 nm formed between the barrier layer and the gate; and

a gate-connected field plate electrically connected to the gate and extending beyond edges of the gate toward the drain and source over the first insulating layer.

18. The HEMT of claim 17, further comprising:

a source-connected field plate comprising a conductor that is electrically connected to the source and extends over the gate; and

a second insulating layer separating the source-connected field plate and the gate.

19. The HEMT of claim 18, wherein the source-connected field plate extends beyond the gate-connected field plate toward the drain a distance between approximately 1 micron and approximately 4 microns.

20. The HEMT of claim 19, wherein an edge of the source-connected field plate is between approximately 4 microns and approximately 10 microns from an edge of the drain.

21. The HEMT of claim 18, wherein a thickness of the first insulating layer is between approximately 25 nm and approximately 200 nm.

22. The HEMT of claim 18, wherein a thickness of the second insulating layer is between approximately 300 nm and approximately 600 nm.

23. The HEMT of claim 18 configured to withstand a reverse-bias voltage of approximately 2000 volts.

24. The HEMT of claim 23, wherein a reverse-leakage current at 2000 volts reverse bias is not more than 40 microamps per millimeter of gate width.

25. The HEMT of claim 23 configured to handle a forward current of 1 amp per millimeter of gate width.

26. The HEMT of claim 17, wherein the gate insulating layer comprises gallium-oxide.