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Semiconductor device and battery voltage monitoring device

  • US 10,630,067 B2
  • Filed: 07/06/2017
  • Issued: 04/21/2020
  • Est. Priority Date: 08/24/2012
  • Status: Active Grant
First Claim
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1. A method of measuring voltage of each of a plurality of unit cells series-coupled in multi-stage and configuring an assembled battery, the method using at least one semiconductor device,wherein the semiconductor device comprises:

  • a first terminal to be coupled to a first node which is one electrode of a unit cell and is coupled to another unit cell in the unit cells; and

    a second terminal to be coupled to a second node which is the other electrode of the unit cell and is coupled to another unit cell,wherein the method comprises;

    measuring an inter-terminal voltage between the first terminal and the second terminal by a voltage measurement circuit;

    converting the inter-terminal voltage into a low-potential-side inter-terminal voltage by a first level shifter circuit;

    comparing the low-potential-side inter-terminal voltage with a predetermined reference voltage by a comparator circuit;

    converting a low-potential-side shunt control signal into a high-potential-side shunt control signal by a second level shifter circuit; and

    short-circuiting the first terminal and the second terminal via a first resistor, on the basis of the high-potential-side shunt control signal by a first switch,wherein the semiconductor device further comprises;

    a third terminal to be coupled to the first node; and

    a second resistor coupled between the first terminal and the third terminal,wherein the method further comprises;

    converting a low-potential-side sense enable signal into a high-potential-side sense enable signal by a third level shifter circuit;

    converting a low-potential-side cell balance enable signal into a high-potential-side cell balance enable signal by a fourth level shifter circuit; and

    short-circuiting the third terminal and the second terminal, on the basis of the high-potential-side cell balance enable signal by a third switch, andwherein the first level shifter circuit comprises;

    a voltage-to-current converter circuit operable to convert the inter-terminal voltage into a current value corresponding to the inter-terminal voltage;

    a current-to-voltage converter circuit operable to convert the current value into a low-potential-side inter-terminal voltage corresponding to the current value;

    a second switch operable to control operation of the voltage-to-current converter circuit, on the basis of the high-potential-side sense enable signal; and

    a fourth switch operable to control operation of the voltage-to-current converter circuit, on the basis of a potential of the third terminal, in parallel with the second switch.

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