Transmission apparatus, transmission system, and transmission method

• US 10,637,564 B2
• Filed: 02/19/2019
• Issued: 04/28/2020
• Est. Priority Date: 03/01/2018
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Ishikawa, Eiji
• Primary Examiner(s): Liu, Li
• Application Number:
  US16/279,369
• Publication Number:
  US 20190273557A1
• Time in Patent Office: 434 Days
• Field of Search: 398 1- 8
• CPC Class Codes: H04B 10/032 using working and protection systems H04J14/0287 takes precedence
• CPC Class Codes: H04B 10/27 Arrangements for networking
• CPC Class Codes: H04B 10/516 Details of coding or modulation
• CPC Class Codes: H04B 10/5161 Combination of different modulation schemes

Abstract

A transmission apparatus includes a memory and a processor coupled to the memory and configured to produce a bit string from a given number of bits of first bit data and second bit data, map the bit string to a symbol corresponding to a data value of the bit string according to a multi-level modulation system and transmit the bit string to a transmission path and acquire the first bit data and the second bit data from a first data signal and a second data signal, respectively, when the transmission path is an active transmission path and acquire the same first bit data and second bit data from the first data signal when the transmission path is a standby transmission path.

Claims

1. A transmission apparatus coupled to an active transmission path and a standby transmission path, the transmission apparatus comprising:

a memory; and

a processor coupled to the memory and configured to;

when the active transmission path is used for transmission,

produce a first bit string by combining first bit data and second bit data,

map the first bit string to a symbol corresponding to a data value of the first bit string according to a multi-level modulation system, and

transmit the first bit string to the active transmission path; and

when the a standby transmission path is used for transmission,

duplicate first bit data,

produce a second bit string by combining, in 2 bits, the first bit data and the duplicated first bit data,

map the second bit string to a symbol corresponding to a data value of the second bit string according to the multi-level modulation system, and

transmit the second bit string to the standby transmission path.

2. The transmission apparatus according to claim 1, wherein

the processor allocates the first bit data to an upper side of the second bit string and allocates the duplicated first bit data to a lower side of the second bit string to produce the second bit string.

3. The transmission apparatus according to claim 2, wherein

a data value of the second bit string corresponds to a symbol positioned at a corner of an area surrounding a plurality of symbols arrayed in a constellation among the plurality of symbols.

4. The transmission apparatus according to claim 2, wherein

symbols corresponding to the upper bit string and the lower bit string are mapped to the four corners of the IQ plane, and

the upper bit string and the lower bit string have a same pattern.

5. The transmission apparatus according to claim 1,

when the active transmission path is used for transmission, wherein the processor produces the first bit string by combining the first bit data, the second bit data, and third bit data,

when the standby transmission path is used for transmission, wherein the processor duplicate the first bit data and produce the second bit string by combining, in 2 bits, the first bit data and a plurality of the duplicated first bit data.

6. The transmission apparatus according to claim 5, wherein

a data value of the second bit string produced from first data and the plurality of the duplicated first data corresponds to a symbol positioned at a corner of an area surrounding a plurality of symbols arrayed in a constellation among the plurality of symbols.

7. The transmission apparatus according to claim 1,

when the active transmission path is used for transmission, wherein the processor produces the first bit string by combining the first bit data, the second bit data, and third bit data, and

when the standby transmission path is used for transmission, wherein the processor duplicate the first bit data and produce the second bit string by combining, in 2 bits, the first bit data, the duplicated first bit data, and the third bit data.

8. A transmission system comprising:

a first transmission apparatus and a second transmission apparatus coupled through an active transmission path and a standby transmission path,

when the active transmission path is used for transmission,

wherein the first transmission apparatus

produces a first bit string by combining first bit data and second bit data,

maps the first bit string to a symbol corresponding to a data value of the first bit string according to a multi-level modulation system, and

transmits the first bit string to the active transmission path; and

wherein the second transmission apparatus

demodulates the first bit string, and

separates the first bit data and the second bit data from the demodulated first bit string, and

when the a standby transmission path is used for transmission,

wherein the first transmission apparatus

duplicates first bit data,

produces a second bit string by combining, in 2 bits, the first bit data and the duplicated first bit data,

maps the second bit string to a symbol corresponding to a data value of the second bit string according to the multi-level modulation system, and

transmits the second bit string to the standby transmission path, and

wherein the second transmission apparatus

demodulates the second bit string, and

separates the first bit data from the demodulated second bit string.

9. The transmission system according to claim 8, wherein

the first transmission apparatus allocates the first bit data to an upper side of the second bit string and allocating the duplicated first bit data to a lower side of the second bit string to produce the second bit string,

symbols corresponding to the upper bit string and the lower bit string are mapped to the four corners of the IQ plane, and

the upper bit string and the lower bit string have a same pattern.

10. A transmission method comprising:

when the active transmission path is used for transmission,

producing a first bit string by combining first bit data and second bit data,

mapping the first bit string to a symbol corresponding to a data value of the first bit string according to a multi-level modulation system, and

transmitting the first bit string to the active transmission path; and

when the a standby transmission path is used for transmission,

duplicating first bit data,

producing a second bit string by combining, in 2 bits, the first bit data and the duplicated first bit data,

mapping the second bit string to a symbol corresponding to a data value of the second bit string according to the multi-level modulation system, and

transmitting the second bit string to the standby transmission path.

11. The transmission method according to claim 10, further comprising:

allocating the first bit data to an upper side of the second bit string and allocating the duplicated first bit data to a lower side of the second bit string to produce the second bit string.

12. The transmission method according to claim 11, wherein

symbols corresponding to the upper bit string and the lower bit string are mapped to the four corners of the IQ plane, and

the upper bit string and the lower bit string have a same pattern.