Column ADC

• US 10,641,729 B2
• Filed: 07/08/2015
• Issued: 05/05/2020
• Est. Priority Date: 06/30/2010
• Status: Active Grant

• Current Assignee: Life Technologies Corporation (Thermo Fisher Scientific Incorporated)
• Original Assignee: Life Technologies Corporation (Thermo Fisher Scientific Incorporated)
• Inventors: Fife, Keith G.
• Primary Examiner(s): Patel, Paresh
• Application Number:
  US14/794,595
• Publication Number:
  US 20160033449A1
• Time in Patent Office: 1,763 Days
• Field of Search: None
• CPC Class Codes: C12Q 1/6869 Methods for sequencing
• CPC Class Codes: G01J 1/46 using a capacitor
• CPC Class Codes: G01N 27/4143 Air gap between gate and channel, i.e. suspended gate [SG] FETs work function measurement per se G01N27/002
• CPC Class Codes: G01N 27/4145 specially adapted for biomolecules, e.g. gate electrode with immobilised receptors
• CPC Class Codes: G01N 27/4148 Integrated circuits therefor, e.g. fabricated by CMOS processing CMOS processing per se H01L21/82
• CPC Class Codes: G01N 33/00 Investigating or analysing materials by specific methods not covered by groups G01N1/00 - G01N31/00
• CPC Class Codes: G01R 29/26 Measuring noise figure; Measuring signal-to-noise ratio
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 29/66 Types of semiconductor device ; Multistep manufacturing processes therefor
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: Y10T 436/25875 Gaseous sample or with change of physical state

Abstract

The described embodiments may provide a chemical detection circuit. The chemical detection circuit may comprise a column of chemically-sensitive pixels. Each chemically-sensitive pixel may comprise a chemically-sensitive transistor, and a row selection device. The chemical detection circuit may further comprise a column interface circuit coupled to the column of chemically-sensitive pixels and an analog-to-digital converter (ADC) coupled to the column interface circuit. Each column interface circuit and column-level ADC may be arrayed with other identical circuits and share critical resources such as biasing and voltage references, thereby saving area and power.

Claims

1. A method to reduce error in generating an output signal for a chemical detection integrated circuit chip, comprising:

generating a row selection signal by a row decoder of the chemical detection integrated circuit chip, the chemical detection integrated circuit chip having a pixel array that includes a plurality of rows and columns of chemical detection pixels, each chemical detection pixel including;

a chemically-sensitive transistor; and

a row selection device;

applying the row selection signal to a respective row selection device of a selected chemical detection pixel;

converting an analog signal at a readout signal line of a column of chemical detection pixels to a digital signal by an Analog-to-Digital converter (ADC) on the chemical detection integrated circuit chip-to provide digitized data;

serializing the digitized data in parallel for each column of chemical detection pixels on the chemical detection integrated circuit chip; and

outputting the digitized data as the output signal from the chemical detection integrated circuit chip on a plurality of serial links in parallel.

2. The method of claim 1, wherein each column of chemical detection pixels has a dedicated ADC.

3. The method of claim 1, wherein two columns of chemical detection pixels share one ADC by multiplexing.

4. The method of claim 1, wherein the chemical detection integrated circuit chip includes multiple columns of chemical detection pixels and multiple ADCs, the ADCs are configured to perform AD conversion in parallel.

5. The method of claim 4, wherein the ADCs share bias reference voltages and signal reference voltages for area and power savings.