Waveguide mirror and method of fabricating a waveguide mirror

• US 10,641,962 B2
• Filed: 03/28/2019
• Issued: 05/05/2020
• Est. Priority Date: 03/29/2018
• Status: Active Grant

• Current Assignee: Rockley Photonics Limited
• Original Assignee: Rockley Photonics Limited
• Inventors: Nykanen, Henri, Drake, John Paul, Kho, Evie, Lerose, Damiana, Makela, Sanna Leena, Nagra, Amit Singh
• Primary Examiner(s): Doan, Jennifer
• Application Number:
  US16/368,605
• Publication Number:
  US 20190302366A1
• Time in Patent Office: 404 Days
• CPC Class Codes: G02B 2006/12061 Silicon
• CPC Class Codes: G02B 2006/12104 Mirror; Reflectors or the like
• CPC Class Codes: G02B 2006/12176 Etching
• CPC Class Codes: G02B 2006/12178 Epitaxial growth
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: G02B 6/125 Bends, branchings or intersections
• CPC Class Codes: G02B 6/136 by etching
• CPC Class Codes: G02B 6/26 Optical coupling means G02B6/36, G02B6/42 take precedence
• CPC Class Codes: G02B 6/4214 the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device G02B6/4246 takes precedence

Abstract

A mirror and method of fabricating the mirror, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; creating a via in the silicon device layer, the via extending to the BOX layer; etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer; applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel; the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer; the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and applying a metal coating to the underside surface.

Claims

1. A method of fabricating a mirror, the method comprising:

providing a silicon-on-insulator substrate, the substrate comprising;

a silicon support layer;

a buried oxide (BOX) layer on top of the silicon support layer; and

a silicon device layer on top of the BOX layer;

creating a via in the silicon device layer, the via extending to the BOX layer;

etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer;

applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel;

the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer;

the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and

applying a metal coating to the underside surface,

wherein the step of applying the metal coating to the underside surface is carried out by atomic layer deposition (ALD).

2. The method of claim 1, wherein the etchant used in the anisotropic etch is one of:

TMAH, KOH or CsOH.

3. The method of claim 1, wherein the silicon device layer is {100} oriented.

4. The method of claim 1, wherein the step of creating a via in the silicon device layer includes:

etching a via in the silicon device layer, the via extending from the upper surface of the silicon device layer down to the interface between the silicon device layer and the BOX layer, the via having a base and two sidewalls; and

applying a protective nitride layer to a region of the base.

5. The method of claim 4, wherein the step of etching away a portion of the BOX layer includes a step of first applying an additional protective patterning layer over the nitride layer.

6. The method of claim 1, wherein the planar underside surface forms an angle of 54.7 degrees relative to the top surface of the silicon device layer.

7. The method of claim 1, wherein the walls of the cavity include no more than one overhanging portion of the silicon device layer.