Hardware virtualized input output memory management unit
First Claim
1. An apparatus for performing computation, comprising:
- a physical processor element capable of being configured to execute a hypervisor that hosts one or more guest Operating Systems (OS) by presenting a respective virtualized machine interface to each hosted guest OS;
a physical memory;
an Input/Output (I/O) device; and
an I/O Memory Management Unit (IOMMU) coupled to the physical processor element, the IOMMU configured to;
receive from the hypervisor a direct mapping between a guest address for a hosted guest OS, and an address in the physical memory,store the mapping in a Translation Lookaside Buffer (TLB) maintained within the IOMMU,store a mapping in a device table between a guest identifier for the guest OS and an identifier for the I/O device,receive from the I/O device a request to access the physical memory, the request specifying an identifier for the I/O device, and responsive to receiving the request, to lookup the specified I/O device identifier in the device table, wherein the device table is modified by a corresponding entry in a device remap table,if the device table, as modified by the corresponding entry in the device remap table, comprises a matching entry, then to obtain a guest identifier from the matching entry, and use that obtained guest identifier and a device address provided with the request to index the TLB to determine an address in the physical memory that corresponds to the device address, andinitiate fulfillment of the I/O device request.
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Accused Products
Abstract
Aspects relate to Input/Output (IO) Memory Management Units (MMUs) that include hardware structures for implementing virtualization. Some implementations allow guests to setup and maintain device IO tables within memory regions to which those guests have been given permissions by a hypervisor. Some implementations provide hardware page table walking capability within the IOMMU, while other implementations provide static tables. Such static tables may be maintained by a hypervisor on behalf of guests. Some implementations reduce a frequency of interrupts or invocation of hypervisor by allowing transactions to be setup by guests without hypervisor involvement within their assigned device IO regions. Devices may communicate with IOMMU to setup the requested memory transaction, and completion thereof may be signaled to the guest without hypervisor involvement. Various other aspects will be evident from the disclosure.
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Citations
28 Claims
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1. An apparatus for performing computation, comprising:
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a physical processor element capable of being configured to execute a hypervisor that hosts one or more guest Operating Systems (OS) by presenting a respective virtualized machine interface to each hosted guest OS; a physical memory; an Input/Output (I/O) device; and an I/O Memory Management Unit (IOMMU) coupled to the physical processor element, the IOMMU configured to; receive from the hypervisor a direct mapping between a guest address for a hosted guest OS, and an address in the physical memory, store the mapping in a Translation Lookaside Buffer (TLB) maintained within the IOMMU, store a mapping in a device table between a guest identifier for the guest OS and an identifier for the I/O device, receive from the I/O device a request to access the physical memory, the request specifying an identifier for the I/O device, and responsive to receiving the request, to lookup the specified I/O device identifier in the device table, wherein the device table is modified by a corresponding entry in a device remap table, if the device table, as modified by the corresponding entry in the device remap table, comprises a matching entry, then to obtain a guest identifier from the matching entry, and use that obtained guest identifier and a device address provided with the request to index the TLB to determine an address in the physical memory that corresponds to the device address, and initiate fulfillment of the I/O device request. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An Input/Output Memory Management Unit (IOMMU), comprising:
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a device table storing entries mapping respective guest identifiers to respective I/O devices, each guest identifier identifying a respective GuestOS executing on a processor coupled with the IOMMU, and indicating read and write permissions to be accorded the I/O device; a device remap table, wherein the device remap table is used to modify corresponding entries in the device table; a Translation Lookaside Buffer (TLB) storing entries directly mapping device addresses supplied in I/O device requests to physical addresses within a system memory; and circuitry configured to receive an I/O device request, verify that the I/O device request maps to a valid guest identifier using the device table, as modified by the device remap table, and use the TLB to identify a physical address corresponding to a device address supplied in the received I/O device request. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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Specification