Methods for performing a memory resource retry

• US 10,642,740 B2
• Filed: 06/04/2018
• Issued: 05/05/2020
• Est. Priority Date: 02/24/2016
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Saha, Bikram, Kaushikkar, Harshavardhan, Biswas, Sukalpa, Jain, Prashant
• Primary Examiner(s): Song, Hua J
• Application Number:
  US15/996,776
• Publication Number:
  US 20180276128A1
• Time in Patent Office: 701 Days
• Field of Search: 711119
• CPC Class Codes: G06F 12/0842 for multiprocessing or multitasking
• CPC Class Codes: G06F 2212/1024 Latency reduction
• CPC Class Codes: G06F 2212/283 Plural cache memories

Abstract

In an embodiment, an apparatus includes multiple memory resources, and a resource table that includes entries that correspond to respective memory resources of the multiple memory resources. The apparatus also includes a circuit configured to receive a first memory command. The first memory command is associated with a subset of the multiple memory resources. For each memory resource of the subset, the circuit is also configured to set a respective indicator associated with the first memory command, and to store a first value in a first entry of the resource table in response to a determination that the respective memory resource is unavailable. The circuit is also configured to store a second value in each entry of the resource table that corresponds to a memory resource of the subset in response to a determination that an entry corresponding to a given memory resource of the subset includes the first value.

Claims

1. An apparatus, comprising:

a plurality of memory resources, each memory resource configured to store one or more types of memory commands to be processed;

a memory; and

a control circuit configured to;

maintain, in the memory, a command tracker table that includes a plurality of entries, each entry corresponding to a respective memory command;

receive a particular memory command of a particular type;

store a value identifying the particular memory command in a first entry of the command tracker table;

based on the particular type, set an indication in the first entry identifying each memory resource of the plurality of memory resources to be used by the particular memory command; and

execute the particular memory command in response to a determination that all memory resources identified in the first entry are available.

2. The apparatus of claim 1, wherein the control circuit is further configured to:

receive a subsequent memory command of a different type; and

store a value identifying the subsequent memory command in a second entry of the command tracker table.

3. The apparatus of claim 2, wherein the particular memory command and the subsequent memory command have respective, different priorities, and wherein the control circuit is further configured to store the value identifying the subsequent memory command in response to a determination that the second entry corresponds to a priority of the subsequent memory command and that the second entry is available.

4. The apparatus of claim 1, wherein the command tracker table includes one entry corresponding to each of a set of priorities.

5. The apparatus of claim 4, wherein the particular memory command and a subsequently received memory command have a same priority, and wherein the control circuit is further configured to exclude the subsequently received memory command from the command tracker table in response to a determination that the first entry corresponds to a priority of the subsequently received memory command and that the first entry is in use by the particular memory command.

6. The apparatus of claim 1, wherein the memory further includes a memory command queue that includes a plurality of entries for storing a plurality of memory commands and wherein the command tracker table includes a number of entries equal to a number of entries in the memory command queue.

7. The apparatus of claim 1, wherein the memory further includes a resource tracking table that includes at least one entry corresponding to each of the plurality of memory resources, and wherein the control circuit is further configured to, in response to a determination that at least one memory resource identified in the first entry is not available, set a value identifying the particular memory command in the resource tracking table in a respective entry corresponding to each of the memory resources identified in the first entry.

8. A method, comprising:

receiving, by a cache controller circuit, a particular memory command of a particular type;

storing, by the cache controller circuit, a value identifying the particular memory command in a first entry of a command tracker table;

based on the particular type, setting, by the cache controller circuit, an indication in the first entry identifying each memory resource of a plurality of resources to be used by the particular memory command; and

executing, by the cache controller circuit, the particular memory command in response to determining that all memory resources identified in the first entry are available.

9. The method of claim 8, further comprising:

receiving a subsequent memory command of a different type; and

storing a value identifying the subsequent memory command in a second entry of the command tracker table.

10. The method of claim 9, further comprising storing the value identifying the subsequent memory command in response to determining that the second entry corresponds to a priority of the subsequent memory command and that the second entry is available, wherein the particular memory command and the subsequent memory command have respective, different priorities.

11. The method of claim 10, further comprising, in response to determining that a previously unavailable resource is now available, determining if a memory command in the command tracker table is waiting for the now available resource, wherein the determining includes reviewing memory commands in the command tracker table based on respective priorities of the memory commands.

12. The method of claim 8, further comprising excluding a subsequently received memory command from the command tracker table in response to determining that the first entry corresponds to a priority of the subsequently received memory command and that the first entry is in use by the particular memory command, wherein the particular memory command and the subsequently received memory command have a same priority.

13. The method of claim 8, further comprising, in response to a determination that at least one memory resource identified in the first entry is not available, setting a value indicating that the particular memory command is waiting for the at least one identified memory resource to become available.

14. The method of claim 8, further comprising, setting a value identifying the particular memory command in a resource tracking table in respective entries corresponding to each of the memory resources identified in the first entry.

15. An apparatus, comprising:

a plurality of memory resources, each memory resource configured to store one or more types of memory commands to be processed;

a memory; and

a control circuit configured to;

maintain a memory command queue that includes a plurality of entries, each entry corresponding to a respective memory command;

retrieve, from a first entry in the memory command queue, a particular memory command of a particular type;

based on the particular type, set an indication in the first entry identifying each memory resource of the plurality of memory resources to be used by the particular memory command; and

execute the particular memory command in response to a determination that all memory resources identified in the first entry are available.

16. The apparatus of claim 15, wherein the control circuit is further configured to:

retrieve, from a second entry in the memory command queue, a subsequent memory command of a different type;

based on the different type, set an indication in the second entry identifying each memory resource of the plurality of memory resources to be used by the subsequent memory command; and

in response to a determination that at least one memory resources identified in the second entry is not available, set a retry indication in the second entry indicating that the subsequent memory command is waiting for the at least one identified memory resource to become available.

17. The apparatus of claim 16, wherein the memory further includes a resource tracking table that includes at least one entry corresponding to each of the plurality of memory resources, and wherein the control circuit is further configured to set a value identifying the subsequent memory command in the resource tracking table in a respective entry corresponding to each of the memory resources identified in the second entry.

18. The apparatus of claim 16, wherein the control circuit is further configured to store, in the second entry, a value indicating a priority for the subsequent memory command.

19. The apparatus of claim 18, wherein the control circuit is further configured to execute the subsequent memory command in response to a determination that the memory resources identified in the second entry are available and that the indicated priority in the second entry is greater than indicated priorities in other entries identifying available memory resources.

20. The apparatus of claim 15, wherein the control circuit is further configured to:

in response to a determination that a previously unavailable resource is now available, review memory commands in the memory command queue with a respective retry indication set; and

determine if a reviewed memory command is waiting for the now available resource.