Electronic device and method for managing memory thereof

• US 10,642,749 B2
• Filed: 10/20/2016
• Issued: 05/05/2020
• Est. Priority Date: 10/27/2015
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Hwang, Chanyoung, Kwon, Soonwan
• Primary Examiner(s): Portka, Gary J
• Application Number:
  US15/771,363
• Publication Number:
  US 20180314644A1
• Time in Patent Office: 1,293 Days
• Field of Search: 711205, 711206, 711207, 711209
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 2212/1044 Space efficiency improvement
• CPC Class Codes: G06F 2212/657 Virtual address space management
• CPC Class Codes: G06F 2212/68 Details of translation look-aside buffer [TLB]

Abstract

An electronic device and a method for managing memory thereof are disclosed. According to an embodiment of the present disclosure, a method for an electronic device to manage memory, comprising: determining whether a physical address mapped to a virtual address is consecutive with respect to at least two entries belonging to a plurality of entries having virtual addresses and physical addresses mapped and including a consecutive virtual address; merging entries in which the virtual address and the physical address are consecutive into one entry if, as a result of the determination, the physical addresses of the at least entries are consecutive; and storing the merged entry in first memory.

Claims

1. A method for an electronic device to manage memory, comprising:

determining whether at least two virtual addresses are contiguous, from a plurality of entries;

determining whether at least two physical addresses mapped to the at least two virtual addresses are contiguous, in case that the at least two virtual addresses are contiguous;

merging at least two entries in which the virtual address and the physical address are consecutive into one merged entry, in case that the at least two physical addresses are contiguous, the merged entry including a specific bit; and

storing the merged entry in a first memory comprising a plurality of ways, the merged entry comprising information indicating a number of entries being merged,

wherein a location, where the merged entry is stored, is determined at a way of the plurality of ways based on the specific bit and the information indicating the number of entries being merged.

2. The method of claim 1, further comprising:

searching whether the virtual address and the physical address mapped to the virtual address are stored in the first memory, in case that the virtual address needs to be converted into the physical address;

determining whether physical addresses of a plurality of consecutive page table entries (PTE) stored in a second memory are consecutive with respect to the plurality of consecutive PTEs, in case that information about the virtual address has not been stored in the first memory;

merging the plurality of consecutive PTEs into one merged entry, in case that the physical addresses are consecutive; and

storing the merged entry in the first memory.

3. The method of claim 1, further comprising:

searching the first memory for a first virtual address which is a virtual address of a most recently used entry;

searching for a second virtual address which is a virtual address consecutive to the first virtual address;

determining whether a second physical address mapped to the second virtual address is consecutive to a first physical address mapped to the first virtual address in the first memory; and

merging an entry for the first virtual address and an entry for the second virtual address into one merged entry, in case that the first physical address and the second physical address are consecutive,

wherein the storing of the merged entry further comprises;

determining a storage location on the first memory based on the specific bit of the virtual address included in the merged entry and a size of a page for the merged entry; and

storing the merged entry in the determined location.

4. The method of claim 3, further comprising:

identifying a ratio of a size of a page for each of a plurality of merge entries stored in the first memory;

controlling a size of a region stored in the first memory according to the size of a page indicated by the merge entry based on the ratio;

setting a storage region corresponding to the size of a page for the merged entry in the first memory in case that the storage region corresponding to the size of the page for the merged entry has not been previously stored in the first memory; and

storing the merged entry in the set region.

5. The method of claim 3, further comprising:

determining a search location within the first memory using the specific bit included in the virtual address in case that the virtual address needs to be converted into the physical address; and

accessing an entry corresponding to the virtual address based on a size of a page predetermined with respect to the search location,

wherein the first memory is a translation lookaside buffer (TLB), and

the storing of the merged entry comprises storing the merged entry in one region of the plurality of ways based on the size of a page for the merged entry.

6. The method of claim 1, further comprising:

receiving a virtual address for address conversion;

identifying the specific bit of the virtual address;

determining a location where an entry according to the identified specific bit has been stored in the first memory;

determining whether an entry corresponding to the virtual address has been stored at the determined location; and

converting the virtual address into a physical address based on a result of the determination,

wherein the converting of the virtual address further comprises;

searching a plurality of consecutive page table entries (PTE) stored in a second memory for the entry corresponding to the virtual address in case that the entry corresponding to the virtual address has not been stored at the determined location; and

converting the virtual address into the physical address based on a result of the search.

7. An electronic device, comprising:

a first memory; and

a controller configured to determine whether at least two virtual addresses are contiguous, from a plurality of entries, determine whether at least two physical addresses mapped to the at least two virtual addresses are contiguous, in case that the at least two virtual addresses are contiguous, merge at least two entries in which the virtual address and the physical address are consecutive into one merged entry, in case that the at least two physical addresses are contiguous, the merged entry including a specific bit, and store the merged entry in the first memory comprising a plurality of ways, the merged entry comprising information indicating a number of entries being merged,

wherein a location, where the merged entry is stored, is determined at a way of the plurality of ways based on the specific bit and the information indicating the number of entries being merged.

8. The electronic device of claim 7, further comprising a second memory,

wherein the controller is configured to search whether the virtual address and the physical address mapped to the virtual address are stored in the first memory in case that the virtual address needs to be converted into the physical address, to determine whether physical addresses of a plurality of consecutive page table entries (PTE) stored in the second memory are consecutive with respect to the plurality of consecutive PTEs, in case that information about the virtual address has not been stored in the first memory, to merge the plurality of consecutive PTEs into one merged entry, in case that the physical addresses are consecutive, and to store the merged entry in the first memory.

9. The electronic device of claim 7, wherein the controller is configured to search the first memory for a first virtual address which is a virtual address of a most recently used entry, to search for a second virtual address which is a virtual address consecutive to the first virtual address, to determine whether a second physical address mapped to the second virtual address is consecutive to a first physical address mapped to the first virtual address in the first memory, and to merge an entry for the first virtual address and an entry for the second virtual address into one merged entry, in case that the first physical address and the second physical address are consecutive.

10. The electronic device of claim 7, wherein the controller is configured to determine a storage location on the first memory based on the specific bit of the virtual address included in the merged entry and a size of a page for the merged entry and to store the merged entry in the determined location.

11. The electronic device of claim 8, wherein the controller is configured to identify a ratio of a size of a page for each of a plurality of merge entries stored in the first memory and to control a size of a region stored in the first memory according to the size of a page indicated by the merge entry based on the ratio.

12. The electronic device of claim 9, wherein the controller is configured to set a storage region corresponding to the size of a page for the merged entry in the first memory in case that the storage region corresponding to the size of the page for the merged entry has not been previously stored in the first memory and to store the merged entry in the set region.

13. The electronic device of claim 10, wherein:

the controller is configured to determine a search location within the first memory using the specific bit included in the virtual address in case that the virtual address needs to be converted into the physical address and to access an entry corresponding to the virtual address based on a size of a page predetermined with respect to the search location,

the first memory is a translation lookaside buffer (TLB), and

the controller is configured to store the merge entry in one region of the plurality of ways based on the size of a page for the merged entry.

14. The electronic device of claim 7, further comprising a transceiver,

wherein the controller is configured to receive a virtual address on which address conversion is to be performed through the transceiver, to determine a location where an entry according to the identified specific bit has been stored in the first memory by identifying specific bit of the virtual address, to determine whether an entry corresponding to the virtual address has been stored at the determined location, and to convert the virtual address into a physical address based on a result of the determination.

15. The electronic device of claim 8, further comprising a second memory,

wherein the controller is configured to search a plurality of consecutive page table entries (PTE) stored in the second memory for the entry corresponding to the virtual address, in case that the entry corresponding to the virtual address has not been stored at the determined location and to convert the virtual address into the physical address based on a result of the search.