Slave master-write/read datagram payload extension

• US 10,642,778 B2
• Filed: 11/08/2019
• Issued: 05/05/2020
• Est. Priority Date: 05/10/2017
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Mishra, Lalan Jee, Prasad, Mohit Kishore, Wietfeldt, Richard Dominic, Chun, Christopher Kong Yee
• Primary Examiner(s): Tseng, Cheng Yuan
• Application Number:
  US16/678,827
• Publication Number:
  US 20200073847A1
• Time in Patent Office: 179 Days
• CPC Class Codes: G06F 13/102 where the programme performs an interfacing function, e.g. device driver G06F13/105 takes precedence; scheduling within device drivers G06F9/52; contention policies within device drivers G06F9/4881
• CPC Class Codes: G06F 13/1668 Details of memory controller
• CPC Class Codes: G06F 13/20 for access to input/output bus
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Systems, methods, and apparatus for communicating datagrams over a serial communication link are provided. A transmitting device generates an address field in a datagram, sets a value of at least one bit in the address field to indicate a number of bytes of data associated with a data frame of the datagram, generates the data frame in the datagram, the data frame including the number of bytes of data, and sends the datagram to a receiving device. A receiving device receives a datagram from a transmitting device, decodes an address field of the datagram to detect a number of bytes of data included in a data frame of the datagram based on a value of at least one bit in the address field, and decodes the data frame to recover the detected number of bytes of data.

Claims

1. A method performed at a receiving device for receiving a datagram from a transmitting device, comprising:

receiving the datagram from the transmitting device via a bus interface;

decoding an address field of the datagram to detect a number of bytes of data included in a data frame of the datagram based on a value of at least one bit in the address field, wherein the decoding the address field includes;

reading a first bit value and a second bit value in the address field,

detecting whether a load-exponent mode is enabled or disabled, and

detecting the number of bytes of data included in the data frame based on at least the first bit value and the second bit value and whether the load-exponent mode is enabled or disabled; and

decoding the data frame to recover the detected number of bytes of data.

2. The method of claim 1, wherein the transmitting device is a request-capable slave (RCS) and the datagram is received across a system power management interface (SPMI) bus.

3. The method of claim 1, wherein:

the datagram is a master read datagram provoking the receiving device to perform a read operation with respect to the data included in the data frame;

or

the datagram is a master write datagram provoking the receiving device to perform a write operation with respect to the data included in the data frame.

4. The method of claim 1, wherein the detecting the number of bytes of data included in the data frame includes:

calculating a binary coded decimal value of the first bit value and the second bit value,

wherein if the load-exponent mode is disabled, the binary coded decimal value of the first bit value and the second bit value is equal to M, where M is an integer greater than or equal to 0 and less than or equal to 3 (0≤

M≤

3), and the detected number of bytes of data is equal to M+1, and

wherein if the load-exponent mode is enabled, the binary coded decimal value of the first bit value and the second bit value is equal to N, where N is an integer greater than or equal to 0 and less than or equal to 3 (0≤

N≤

3), and the detected number of bytes of data is equal to 2^N.

5. The method of claim 4, further including communicating a configuration message indicating whether the load-exponent mode is enabled or disabled.

6. The method of claim 1, wherein the decoding the address field further includes:

reading a third bit value and a fourth bit value in the address field; and

detecting the number of bytes of data included in the data frame further based on the third bit value and the fourth bit value,

wherein if the load-exponent mode is disabled, the detecting the number of bytes of data includes calculating a binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value, wherein the binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value is equal to P, where P is an integer greater than or equal to 0 and less than or equal to 15 (0≤

P≤

15), and the detected number of bytes of data is equal to P+1, and

wherein if the load-exponent mode is enabled, the detecting the number of bytes of data includes calculating a first binary coded decimal value of the first bit value and the second bit value wherein the first binary coded decimal value of the first bit value and the second bit value is equal to Q, where Q is an integer greater than or equal to 0 and less than or equal to 3 (0≤

Q≤

3), and calculating a second binary coded decimal value of the third bit value and the fourth bit value, wherein the second binary coded decimal value of the third bit value and the fourth bit value is equal to R, where R is an integer greater than or equal to 0 and less than or equal to 3 (0≤

R≤

3), and the detected number of bytes of data is equal to 2^Q+2^R.

7. The method of claim 1, wherein the decoding the data frame includes at least one of:

detecting a bus park (BP) at an end of the number of bytes of data in the data frame;

or

detecting the BP between each byte of data of the number of bytes of data in the data frame.

8. The method of claim 1, wherein a first portion of the address field includes the at least one bit on which detection of the number of bytes of data is based and a second portion of the address field includes at least one other bit corresponding to an address of the receiving device.

9. A receiving device for receiving a datagram from a transmitting device, comprising:

a bus interface; and

a processing circuit coupled to the bus interface and configured to;

receive the datagram from the transmitting device via the bus interface,

decode an address field of the datagram to detect a number of bytes of data included in a data frame of the datagram based on a value of at least one bit in the address field wherein the processing circuit configured to decode the address field is configured to;

read a first bit value and a second bit value in the address field,

detect whether a load-exponent mode is enabled or disabled, and

detect the number of bytes of data included in the data frame based on at least the first bit value and the second bit value and whether the load-exponent mode is enabled or disabled, and

decode the data frame to recover the detected number of bytes of data.

10. The receiving device of claim 9, wherein:

the datagram is a master read datagram provoking the receiving device to perform a read operation with respect to the data included in the data frame;

or

the datagram is a master write datagram provoking the receiving device to perform a write operation with respect to the data included in the data frame.

11. The receiving device of claim 9, wherein the processing circuit configured to detect the number of bytes of data included in the data frame is configured to:

calculate a binary coded decimal value of the first bit value and the second bit value,

wherein if the load-exponent mode is disabled, the binary coded decimal value of the first bit value and the second bit value is equal to M, where M is an integer greater than or equal to 0 and less than or equal to 3 (0≤

M≤

3), and the detected number of bytes of data is equal to M+1, and

wherein if the load-exponent mode is enabled, the binary coded decimal value of the first bit value and the second bit value is equal to N, where N is an integer greater than or equal to 0 and less than or equal to 3 (0≤

N≤

3), and the detected number of bytes of data is equal to 2^N.

12. The receiving device of claim 11, the processing circuit further configured to communicate a configuration message indicating whether the load-exponent mode is enabled or disabled.

13. The receiving device of claim 9, wherein the processing circuit configured to decode the data frame is configured to at least one of:

detect a bus park (BP) at an end of the number of bytes of data in the data frame;

or

detect the BP between each byte of data of the number of bytes of data in the data frame.

19. The receiving device of claim 9, wherein the processing circuit configured to decode the address field is configured to:

read a third bit value and a fourth bit value in the address field; and

detect the number of bytes of data included in the data frame further based on the third bit value and the fourth bit value,

wherein if the load-exponent mode is disabled, the processing circuit configured to decode the address field is configured to detect the number of bytes of data by calculating a binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value, wherein the binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value is equal to P, where P is an integer greater than or equal to 0 and less than or equal to 15 (0≤

P≤

15), and the detected number of bytes of data is equal to P+1, and

wherein if the load-exponent mode is enabled, the processing circuit configured to decode the address field is configured to detect the number of bytes of data by calculating a first binary coded decimal value of the first bit value and the second bit value wherein the first binary coded decimal value of the first bit value and the second bit value is equal to Q, where Q is an integer greater than or equal to 0 and less than or equal to 3 (0≤

Q≤

3), and calculating a second binary coded decimal value of the third bit value and the fourth bit value, wherein the second binary coded decimal value of the third bit value and the fourth bit value is equal to R, where R is an integer greater than or equal to 0 and less than or equal to 3 (0≤

R≤

3), and the detected number of bytes of data is equal to 2^Q+2^R.

20. The receiving device of claim 9, wherein a first portion of the address field includes the at least one bit on which detection of the number of bytes of data is based and a second portion of the address field includes at least one other bit corresponding to an address of the receiving device.

14. A receiving device for receiving a datagram from a transmitting device, comprising:

means for receiving the datagram from the transmitting device via a bus interface;

means for decoding an address field of the datagram to detect a number of bytes of data included in a data frame of the datagram based on a value of at least one bit in the address field, wherein the means for decoding the address field is configured to;

read a first bit value and a second bit value in the address field,

detect whether a load-exponent mode is enabled or disabled, and

detect the number of bytes of data included in the data frame based on at least the first bit value and the second bit value and whether the load-exponent mode is enabled or disabled; and

means for decoding the data frame to recover the detected number of bytes of data.

15. The receiving device of claim 14, wherein the means for decoding the address field is further configured to:

calculate a binary coded decimal value of the first bit value and the second bit value,

wherein if the load-exponent mode is disabled, the binary coded decimal value of the first bit value and the second bit value is equal to M, where M is an integer greater than or equal to 0 and less than or equal to 3 (0≤

M≤

3), and the detected number of bytes of data is equal to M+1, and

wherein if the load-exponent mode is enabled, the binary coded decimal value of the first bit value and the second bit value is equal to N, where N is an integer greater than or equal to 0 and less than or equal to 3 (0≤

N≤

3), and the detected number of bytes of data is equal to 2^N.

16. The receiving device of claim 15, further including means for communicating a configuration message indicating whether the load-exponent mode is enabled or disabled.

17. The receiving device of claim 14, wherein the means for decoding the address field is further configured to:

read a third bit value and a fourth bit value in the address field; and

detect the number of bytes of data included in the data frame further based on the third bit value and the fourth bit value,

wherein if the load-exponent mode is disabled, the means for decoding the address field is configured to detect the number of bytes of data by calculating a binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value, wherein the binary coded decimal value of the first bit value, the second bit value, the third bit value, and the fourth bit value is equal to P, where P is an integer greater than or equal to 0 and less than or equal to 15 (0≤

P≤

15), and the detected number of bytes of data is equal to P+1, and

wherein if the load-exponent mode is enabled, the means for decoding the address field is configured to detect the number of bytes of data by calculating a first binary coded decimal value of the first bit value and the second bit value wherein the first binary coded decimal value of the first bit value and the second bit value is equal to Q, where Q is an integer greater than or equal to 0 and less than or equal to 3 (0≤

Q≤

3), and calculating a second binary coded decimal value of the third bit value and the fourth bit value, wherein the second binary coded decimal value of the third bit value and the fourth bit value is equal to R, where R is an integer greater than or equal to 0 and less than or equal to 3 (0≤

R≤

3), and the detected number of bytes of data is equal to 2^Q+2^R.

18. The receiving device of claim 14, wherein the means for decoding the data frame is configured to at least one of:

detect a bus park (BP) at an end of the number of bytes of data in the data frame;

or

detect the BP between each byte of data of the number of bytes of data in the data frame.