Adaptive programming voltage for non-volatile memory devices
First Claim
1. A memory die comprising:
- a set of non-volatile storage cells arranged into a plurality of rows, wherein a subset of the set of non-volatile storage cells is configured to store a programming setting; and
an on-die controller configured to;
read the programming setting from the subset of the set of non-volatile storage cells;
write data to the set of non-volatile storage cells using the programming setting;
determine that the programming setting causes suboptimal programming of the data to the set of non-volatile storage cells; and
in response to determining that the programming setting causes the suboptimal programming of the data to the set of non-volatile storage cells, store a revised programming setting in the subset of the set of non-volatile storage cells.
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Accused Products
Abstract
Apparatuses, systems, and methods are disclosed for adjusting a programming setting such as a programming voltage of a set of non-volatile storage cells, such as an SLC NAND array. The non-volatile storage cells may be arranged into a plurality of word lines. A subset of the non-volatile storage cells may be configured to store a programming setting. An on-die controller may be configured to read the programming setting from the setting subset, and write data to the non-volatile storage cells, using the programming setting. The on-die controller may further be configured to determine that the programming setting causes suboptimal programming of one or more of the non-volatile storage cells, and in response to the determination, store a revised programming setting on the setting subset.
16 Citations
23 Claims
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1. A memory die comprising:
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a set of non-volatile storage cells arranged into a plurality of rows, wherein a subset of the set of non-volatile storage cells is configured to store a programming setting; and an on-die controller configured to; read the programming setting from the subset of the set of non-volatile storage cells; write data to the set of non-volatile storage cells using the programming setting; determine that the programming setting causes suboptimal programming of the data to the set of non-volatile storage cells; and in response to determining that the programming setting causes the suboptimal programming of the data to the set of non-volatile storage cells, store a revised programming setting in the subset of the set of non-volatile storage cells. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An apparatus comprising:
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a set of non-volatile storage cells connected to word lines and bit lines, the word lines comprising; a dummy word line configured to store a programming voltage flag; and a plurality of data word lines; an on-die controller comprising; a storage circuit configured to; use a first programming voltage associated with the programming voltage flag to store user data in non-volatile storage cells associated with the plurality of data word lines; a determination circuit configured to determine that the first programming voltage causes over-programming of the non-volatile storage cells associated with the plurality of data word lines; a setting selection circuit configured to, in response to determining by the determination circuit that the first programming voltage causes the over-programming of the non-volatile storage cells associated with the plurality of data word lines, select a second programming voltage different from the first programming voltage; and an update circuit configured to store a revised programming voltage flag associated with the second programming voltage in a non-volatile storage cell associated with the dummy word line by overwriting at least part of the programming voltage flag with the revised programming voltage flag. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A system comprising:
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an SLC NAND array comprising a set of non-volatile storage cells; and an on-die controller that shares a die with the SLC NAND array, wherein the on-die controller is configured to; read a programming voltage setting from the SLC NAND array; initiate a single pulse to write data on the SLC NAND array at the programming voltage setting; determine that the writing of the data at the programming voltage setting causes suboptimal programming of one or more of the set of non-voltage storage cells; and initiate storage of an updated programming voltage setting in response to determining that the writing of the data at the programming voltage setting causes the suboptimal programming of the one or more of the set of non-volatile storage cells. - View Dependent Claims (15, 16)
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17. A method comprising:
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reading a programming setting from a setting segment of non-volatile storage cells; writing data on a data segment of non-volatile storage cells using the programming setting; in response to a trigger, determining that the programming setting causes suboptimal programming on the data segment; and storing a revised programming setting on the setting segment in response to determining that the programming setting causes the suboptimal programming on the data segment. - View Dependent Claims (18, 19, 20, 21, 22)
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23. An apparatus comprising:
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means for reading a programming setting on a spare column associated with a first word line of a plurality of word lines, wherein the plurality of word lines are connected to a set of non-volatile storage cells; means for writing data to one or more of the set of non-volatile storage cells of the plurality of word lines using the programming setting; means for determining that the programming setting causes a threshold voltage of the one or more of the set of non-volatile storage cells to be excessive; and means for storing a revised programming setting on the spare column associated with the first word line in response to determining that the programming setting causes the threshold voltage to be excessive.
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Specification