Semiconductor memory device
First Claim
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1. A semiconductor memory device comprising:
- a substrate;
a memory cell array including a plurality of memory cells arrayed in a first direction crossing the substrate and a second direction crossing the first direction, the memory cells being capable of storing data indicating a plurality of values corresponding to a plurality of threshold levels; and
a control circuit that applies a predetermined voltage to the memory cells to change threshold voltages of the memory cells to a threshold level corresponding to a value of data to be stored respectively, and terminates writing of the data when the threshold level of the memory cells exceeds a predetermined verify voltage, whereinthe memory cell array includes a first memory cell in which first data is stored and a second memory cell adjacent to the first memory cell and in which second data is written after the writing to the first memory cell, andthe control circuit refers to the second data at a time of writing the first data to the first memory cell, and when a value of the second data corresponds to a first threshold level, sets the verify voltage to a first verify voltage, and when the value of the second data corresponds to a second threshold level greater than the first threshold level, sets the verify voltage to a second verify voltage smaller than the first verify voltage.
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Abstract
At a time of writing first data to a first memory cell, second data which is written later to an adjacent second memory cell is referred to, and when a value of the second data corresponds to a first threshold level, a verify voltage is set to a first verify voltage, and when the value of the second data corresponds to a second threshold level greater than the first threshold level, the verify voltage is set to a second verify voltage smaller than the first verify voltage.
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Citations
20 Claims
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1. A semiconductor memory device comprising:
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a substrate; a memory cell array including a plurality of memory cells arrayed in a first direction crossing the substrate and a second direction crossing the first direction, the memory cells being capable of storing data indicating a plurality of values corresponding to a plurality of threshold levels; and a control circuit that applies a predetermined voltage to the memory cells to change threshold voltages of the memory cells to a threshold level corresponding to a value of data to be stored respectively, and terminates writing of the data when the threshold level of the memory cells exceeds a predetermined verify voltage, wherein the memory cell array includes a first memory cell in which first data is stored and a second memory cell adjacent to the first memory cell and in which second data is written after the writing to the first memory cell, and the control circuit refers to the second data at a time of writing the first data to the first memory cell, and when a value of the second data corresponds to a first threshold level, sets the verify voltage to a first verify voltage, and when the value of the second data corresponds to a second threshold level greater than the first threshold level, sets the verify voltage to a second verify voltage smaller than the first verify voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor memory device comprising:
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a substrate; a memory cell array including; a first memory string including a plurality of memory cells connected in series in a first direction crossing the substrate; a second memory string including a plurality of memory cells connected in series in the first direction, and being adjacent to the first memory string in a second direction crossing the first direction; a plurality of first conductive layers respectively connected to the memory cells of the first memory string and arranged in the first direction; a plurality of second conductive layers respectively connected to the memory cells of the second memory string and arranged in the first direction; and a third conductive layer connected to one end of the first memory string, the memory cells being capable of storing data indicating a plurality of values corresponding to a plurality of threshold levels; and a control circuit that applies a predetermined voltage to the first to third conductive layers according to a plurality of writing steps, to change threshold voltages of the memory cells to a threshold level corresponding to a value of data to be stored respectively, and performs a final writing step to terminate writing of the data to a certain memory cell when the threshold level of the certain memory cell exceeds a predetermined verify voltage, wherein the memory cell array includes a first memory cell in which first data is stored and a second memory cell adjacent to the first memory cell and in which second data is written after the writing to the first memory cell, the first memory cell being included in the first memory string, and the control circuit refers to the second data at a time of writing the first data to the first memory cell, and when a value of the second data corresponds to a first threshold level, sets a voltage to be applied to the third conductive layer in the final writing step to a first voltage, and when the value of the second data corresponds to a second threshold level greater than the first threshold level, sets the voltage to be applied to the third conductive layer in the final writing step to a second voltage greater than the first voltage. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification