Bonded semiconductor structures

• US 10,643,836 B2
• Filed: 12/15/2017
• Issued: 05/05/2020
• Est. Priority Date: 07/18/2013
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lin, Jing-Cheng
• Primary Examiner(s): Nguyen, Thinh T
• Application Number:
  US15/843,400
• Publication Number:
  US 20180108524A1
• Time in Patent Office: 872 Days
• Field of Search: 438108, 438406, 438455, 438152, 438153, 257618, 257202, 257499, 257E33, 257 5
• CPC Class Codes: H01L 21/02104 Forming layers deposition in general C23C; crystal growth in general C30B
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 21/8221 Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/14 Integrated circuits

Abstract

A method is disclosed that includes operations as follows. With an ion-implanted layer which is disposed between an epitaxial layer and a first semiconductor substrate, the epitaxial layer is bonded directly to a second semiconductor substrate. The ion-implanted layer is split to separate the first semiconductor substrate from the epitaxial layer completely.

Claims

1. A method, comprising:

after forming an ion-implanted layer which is in contact with and disposed between an epitaxial layer and a first semiconductor substrate, without forming any layer on the epitaxial layer, bonding the epitaxial layer to a second semiconductor substrate; and

splitting the ion-implanted layer to separate the first semiconductor substrate with a portion of the ion-implanted layer from a remaining portion of the ion-implanted layer with the epitaxial layer completely.

2. The method of claim 1, wherein the second semiconductor substrate comprises a semiconductor device portion.

3. The method of claim 2, further comprising:

capping the semiconductor device portion by a bonding oxide layer.

4. The method of claim 1, further comprising:

forming a first semiconductor device portion on the epitaxial layer.

5. The method of claim 4, further comprising:

forming at least one via through the first semiconductor device portion, the epitaxial layer, and a bonding oxide layer, for connecting the first semiconductor device portion to a second semiconductor device portion of the second semiconductor substrate.

6. The method of claim 5, wherein a diameter of the at least one via is less than 4 micrometers.

7. The method of claim 5, further comprising:

forming an interconnect layer on the first semiconductor device portion.

8. The method of claim 1, further comprising:

polishing the epitaxial layer after splitting the ion-implanted layer to separate the first semiconductor substrate from the epitaxial layer completely.

9. The method of claim 1,

wherein the epitaxial layer is bonded to a bonding oxide layer of the second semiconductor substrate.

10. The method of claim 1, further comprising:

implanting at least one implant species between the epitaxial layer and the first semiconductor substrate to form the ion-implanted layer.

11. The method of claim 1, wherein the epitaxial layer comprises Ge, InP, GaAs, or the combination thereof.

12. The method of claim 1, wherein a thickness of the epitaxial layer is in a range of about 1-10 micrometers.

13. A method, comprising:

after forming an ion-implanted layer which is in contact with and disposed between an epitaxial layer and a first semiconductor substrate, bonding the epitaxial layer to a bonding oxide layer of a second semiconductor substrate without forming any layer on the epitaxial layer such that the epitaxial layer is in contact with the bonding oxide layer of the second semiconductor substrate;

splitting the ion-implanted layer to remove the first semiconductor substrate together with a portion of the ion-implanted layer, with the epitaxial layer being remained; and

forming a first semiconductor device portion on the remained epitaxial layer, and an interconnect layer on the first semiconductor device portion.

14. The method of claim 13, wherein the epitaxial layer comprises Ge, InP, GaAs, or the combination thereof.

15. The method of claim 13,

wherein the remained epitaxial layer is bonded to the bonding oxide layer of the second semiconductor substrate.

16. The method of claim 13, further comprising:

polishing the remained epitaxial layer after splitting the ion-implanted layer to remove the first semiconductor substrate together with the portion of the ion-implanted layer.

17. The method of claim 13, further comprising:

implanting at least one implant species between the epitaxial layer and the first semiconductor substrate to form the ion-implanted layer.

18. A method, comprising:

after forming an ion-implanted layer which is in contact with and disposed between an epitaxial layer and a first semiconductor substrate, without forming any layer on the epitaxial layer, bonding the epitaxial layer to a bonding oxide layer of a second semiconductor substrate such that the epitaxial layer is in contact with the bonding oxide layer of the second semiconductor substrate;

splitting the ion-implanted layer to remove the first semiconductor substrate together with a portion of the ion-implanted layer, with the epitaxial layer being remained;

forming a first semiconductor device portion on the remained epitaxial layer;

forming vias through the first semiconductor device portion and the epitaxial layer; and

forming an interconnect layer on the first semiconductor device portion.

19. The method of claim 18, wherein the epitaxial layer comprises Ge, InP, GaAs, or the combination thereof.

20. The method of claim 18, wherein the epitaxial layer is bonded to the bonding oxide layer of the second semiconductor substrate through an oxide layer introduced from the epitaxial layer.